clk: qcom: gpucc-msm8998: switch to parent_hws

Switch gfx3d_clk_src parents to use parent_hws instead of parent_data,
to clarify that these clocks are internal.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
[bjorn: Updated commit message]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230103145515.1164020-16-dmitry.baryshkov@linaro.org

diff --git a/drivers/clk/qcom/gpucc-msm8998.c b/drivers/clk/qcom/gpucc-msm8998.c
index a925ac90018d371bb489052ebfd81b6cfb0f3bb2..f929e0f2333f9bc77a36e2ba12b3137a9d55a44f 100644 (file)
--- a/drivers/clk/qcom/gpucc-msm8998.c
+++ b/drivers/clk/qcom/gpucc-msm8998.c
@@ -106,9 +106,9 @@ static const struct parent_map gpu_xo_gpupll0_map[] = {
        { P_GPUPLL0_OUT_EVEN, 1 },
 };
 
-static const struct clk_parent_data gpu_xo_gpupll0[] = {
-       { .hw = &gpucc_cxo_clk.clkr.hw },
-       { .hw = &gpupll0_out_even.clkr.hw },
+static const struct clk_hw *gpu_xo_gpupll0[] = {
+       &gpucc_cxo_clk.clkr.hw,
+       &gpupll0_out_even.clkr.hw,
 };
 
 static const struct freq_tbl ftbl_rbcpr_clk_src[] = {
@@ -142,7 +142,7 @@ static struct clk_rcg2 gfx3d_clk_src = {
        .freq_tbl = ftbl_gfx3d_clk_src,
        .clkr.hw.init = &(struct clk_init_data){
                .name = "gfx3d_clk_src",
-               .parent_data = gpu_xo_gpupll0,
+               .parent_hws = gpu_xo_gpupll0,
                .num_parents = ARRAY_SIZE(gpu_xo_gpupll0),
                .ops = &clk_rcg2_ops,
                .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,