net/mlx5: Cleanup mlx5_ifc_fte_match_set_misc2_bits
authorRaed Salem <raeds@mellanox.com>
Fri, 15 May 2020 22:16:52 +0000 (15:16 -0700)
committerSaeed Mahameed <saeedm@mellanox.com>
Mon, 18 May 2020 16:21:46 +0000 (09:21 -0700)
Remove the "metadata_reg_b" field and all uses of this field in code
to match the device specification. As this field is not in use in SW
steering it is safe to remove it.

Signed-off-by: Raed Salem <raeds@mellanox.com>
Reviewed-by: Alex Vesker <valex@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h
include/linux/mlx5/mlx5_ifc.h

index c0e3a1e7389d137d02296081ec9f50d8c1baa41e..78c884911ceb35030e9b63551b80b59d81268ee7 100644 (file)
@@ -961,7 +961,6 @@ static void dr_ste_copy_mask_misc2(char *mask, struct mlx5dr_match_misc2 *spec)
        spec->metadata_reg_c_1 = MLX5_GET(fte_match_set_misc2, mask, metadata_reg_c_1);
        spec->metadata_reg_c_0 = MLX5_GET(fte_match_set_misc2, mask, metadata_reg_c_0);
        spec->metadata_reg_a = MLX5_GET(fte_match_set_misc2, mask, metadata_reg_a);
-       spec->metadata_reg_b = MLX5_GET(fte_match_set_misc2, mask, metadata_reg_b);
 }
 
 static void dr_ste_copy_mask_misc3(char *mask, struct mlx5dr_match_misc3 *spec)
index 984783238baa6126f9e6b191943cf1cea6fec37c..71fa01ce348a5a271c8c39f8e35af2f9a73c94c9 100644 (file)
@@ -554,8 +554,7 @@ struct mlx5dr_match_misc2 {
        u32 metadata_reg_c_1;                   /* metadata_reg_c_1 */
        u32 metadata_reg_c_0;                   /* metadata_reg_c_0 */
        u32 metadata_reg_a;                     /* metadata_reg_a */
-       u32 metadata_reg_b;                     /* metadata_reg_b */
-       u8 reserved_auto2[8];
+       u8 reserved_auto2[12];
 };
 
 struct mlx5dr_match_misc3 {
index c9dd6e99ad56c0e7123e6e881c751aa49027705c..fd8da4875ea03019615492d4f031de50e5ffddbe 100644 (file)
@@ -584,9 +584,7 @@ struct mlx5_ifc_fte_match_set_misc2_bits {
 
        u8         metadata_reg_a[0x20];
 
-       u8         metadata_reg_b[0x20];
-
-       u8         reserved_at_1c0[0x40];
+       u8         reserved_at_1a0[0x60];
 };
 
 struct mlx5_ifc_fte_match_set_misc3_bits {