ARM: dts: microchip: sam9x60: align dmas to the opening '<'
authorClaudiu Beznea <claudiu.beznea@tuxon.dev>
Sun, 18 Feb 2024 15:13:53 +0000 (17:13 +0200)
committerClaudiu Beznea <claudiu.beznea@tuxon.dev>
Fri, 23 Feb 2024 19:53:29 +0000 (21:53 +0200)
Align dmas to the opening '<' to comply with the dts coding style,
indentation section, point 3: "For arrays spanning across lines, it is
preferred to align the continued entries with opening < from the first
line."

Link: https://lore.kernel.org/r/20240218151353.3612621-3-claudiu.beznea@tuxon.dev
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
arch/arm/boot/dts/microchip/sam9x60.dtsi

index 73d570a172690cf6ec284c85f8f88c2edb9d63dc..291540e5d81e769a6c23af493b50e9aad089bc0e 100644 (file)
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(8))>,
-                                               <&dma0
+                                              <&dma0
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(9))>;
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(8))>,
-                                               <&dma0
+                                              <&dma0
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(9))>;
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(8))>,
-                                               <&dma0
+                                              <&dma0
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(9))>;
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(10))>,
-                                               <&dma0
+                                              <&dma0
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(11))>;
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(10))>,
-                                               <&dma0
+                                              <&dma0
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(11))>;
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(10))>,
-                                               <&dma0
+                                              <&dma0
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(11))>;
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(22))>,
-                                               <&dma0
+                                              <&dma0
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(23))>;
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(22))>,
-                                               <&dma0
+                                              <&dma0
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(23))>;
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(24))>,
-                                               <&dma0
+                                              <&dma0
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(25))>;
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(24))>,
-                                               <&dma0
+                                              <&dma0
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(25))>;
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(12))>,
-                                               <&dma0
+                                              <&dma0
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(13))>;
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(12))>,
-                                               <&dma0
+                                              <&dma0
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(13))>;
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(14))>,
-                                               <&dma0
+                                              <&dma0
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(15))>;
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(14))>,
-                                               <&dma0
+                                              <&dma0
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(15))>;
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(16))>,
-                                               <&dma0
+                                              <&dma0
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(17))>;
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(16))>,
-                                               <&dma0
+                                              <&dma0
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(17))>;
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(0))>,
-                                               <&dma0
+                                              <&dma0
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(1))>;
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(0))>,
-                                               <&dma0
+                                              <&dma0
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(1))>;
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(0))>,
-                                               <&dma0
+                                              <&dma0
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(1))>;
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(2))>,
-                                               <&dma0
+                                              <&dma0
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(3))>;
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(2))>,
-                                               <&dma0
+                                              <&dma0
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(3))>;
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(2))>,
-                                               <&dma0
+                                              <&dma0
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(3))>;
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(4))>,
-                                               <&dma0
+                                              <&dma0
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(5))>;
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(4))>,
-                                               <&dma0
+                                              <&dma0
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(5))>;
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(4))>,
-                                               <&dma0
+                                              <&dma0
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(5))>;
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(6))>,
-                                               <&dma0
+                                              <&dma0
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(7))>;
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(6))>,
-                                               <&dma0
+                                              <&dma0
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(7))>;
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(6))>,
-                                               <&dma0
+                                              <&dma0
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(7))>;
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(18))>,
-                                               <&dma0
+                                              <&dma0
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(19))>;
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(18))>,
-                                               <&dma0
+                                              <&dma0
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(19))>;
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(20))>,
-                                               <&dma0
+                                              <&dma0
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(21))>;
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(20))>,
-                                               <&dma0
+                                              <&dma0
                                                (AT91_XDMAC_DT_MEM_IF(0) |
                                                 AT91_XDMAC_DT_PER_IF(1) |
                                                 AT91_XDMAC_DT_PERID(21))>;