arm64: dts: ti: k3-am62a-main: Add node for Display SubSystem (DSS)

Add Display SubSystem (DSS) DT node for the AM62A7 SoC.

The DSS supports one each of video pipeline (vid) and video-lite
pipeline (vidl1). The video port 1 (vp1) is tied-off in AM62A SoC, but
the pipeline remains active. The video port 2 (vp2) outputs the DPI
signals. Both the video ports are connected to the pipelines via 2
identical overlay managers (ovr1 and ovr2).

Signed-off-by: Aradhya Bhatia <a-bhatia1@ti.com>
Link: https://lore.kernel.org/r/20240201125452.1920623-2-a-bhatia1@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
index f0b8c9ab14593fe7b87adf196813936e3ca85c8f..d3de5ad3eeb2759041434daa94c430fb2a0954d8 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
@@ -985,4 +985,29 @@
                power-domains = <&k3_pds 185 TI_SCI_PD_EXCLUSIVE>;
                status = "disabled";
        };
+
+       dss: dss@30200000 {
+               compatible = "ti,am62a7-dss";
+               reg = <0x00 0x30200000 0x00 0x1000>, /* common */
+                     <0x00 0x30202000 0x00 0x1000>, /* vidl1 */
+                     <0x00 0x30206000 0x00 0x1000>, /* vid */
+                     <0x00 0x30207000 0x00 0x1000>, /* ovr1 */
+                     <0x00 0x30208000 0x00 0x1000>, /* ovr2 */
+                     <0x00 0x3020a000 0x00 0x1000>, /* vp1: Tied OFF in the SoC */
+                     <0x00 0x3020b000 0x00 0x1000>; /* vp2: Used as DPI Out */
+               reg-names = "common", "vidl1", "vid",
+                           "ovr1", "ovr2", "vp1", "vp2";
+               power-domains = <&k3_pds 186 TI_SCI_PD_EXCLUSIVE>;
+               clocks = <&k3_clks 186 6>,
+                        <&k3_clks 186 0>,
+                        <&k3_clks 186 2>;
+               clock-names = "fck", "vp1", "vp2";
+               interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
+               status = "disabled";
+
+               dss_ports: ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+       };
 };