RISC-V: KVM: Allow Zbc extension for Guest/VM
authorAnup Patel <apatel@ventanamicro.com>
Mon, 27 Nov 2023 10:41:09 +0000 (16:11 +0530)
committerAnup Patel <anup@brainfault.org>
Fri, 19 Jan 2024 03:49:50 +0000 (09:19 +0530)
We extend the KVM ISA extension ONE_REG interface to allow KVM
user space to detect and enable Zbc extension for Guest/VM.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
arch/riscv/include/uapi/asm/kvm.h
arch/riscv/kvm/vcpu_onereg.c

index d6b7a5b958742c443bce93e067434128c1cff7e4..bbff9c7e8f3f8d2c6d5af296d3172f6d2df322ef 100644 (file)
@@ -139,6 +139,7 @@ enum KVM_RISCV_ISA_EXT_ID {
        KVM_RISCV_ISA_EXT_ZIHPM,
        KVM_RISCV_ISA_EXT_SMSTATEEN,
        KVM_RISCV_ISA_EXT_ZICOND,
+       KVM_RISCV_ISA_EXT_ZBC,
        KVM_RISCV_ISA_EXT_MAX,
 };
 
index fc34557f5356e27902a2f83c27eb37f1237c9b95..4522fdfec94ef560898080953b2f1c470f1b3935 100644 (file)
@@ -42,6 +42,7 @@ static const unsigned long kvm_isa_ext_arr[] = {
        KVM_ISA_EXT_ARR(SVPBMT),
        KVM_ISA_EXT_ARR(ZBA),
        KVM_ISA_EXT_ARR(ZBB),
+       KVM_ISA_EXT_ARR(ZBC),
        KVM_ISA_EXT_ARR(ZBS),
        KVM_ISA_EXT_ARR(ZICBOM),
        KVM_ISA_EXT_ARR(ZICBOZ),
@@ -92,6 +93,7 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext)
        case KVM_RISCV_ISA_EXT_SVNAPOT:
        case KVM_RISCV_ISA_EXT_ZBA:
        case KVM_RISCV_ISA_EXT_ZBB:
+       case KVM_RISCV_ISA_EXT_ZBC:
        case KVM_RISCV_ISA_EXT_ZBS:
        case KVM_RISCV_ISA_EXT_ZICNTR:
        case KVM_RISCV_ISA_EXT_ZICOND: