struct nand_chip chip;
        struct list_head chip_list;
 
-       struct nand_ecclayout ecclayout;
-
        struct gpio_desc *busy_gpio;
        struct gpio_desc *wp_gpio;
        unsigned int reading: 1;
        struct nand_chip *chip = &nand->chip;
        struct mtd_info *mtd = nand_to_mtd(chip);
        struct jz4780_nand_controller *nfc = to_jz4780_nand_controller(chip->controller);
-       struct nand_ecclayout *layout = &nand->ecclayout;
-       u32 start, i;
+       int eccbytes;
 
        chip->ecc.bytes = fls((1 + 8) * chip->ecc.size) *
                                (chip->ecc.strength / 8);
                return 0;
 
        /* Generate ECC layout. ECC codes are right aligned in the OOB area. */
-       layout->eccbytes = mtd->writesize / chip->ecc.size * chip->ecc.bytes;
+       eccbytes = mtd->writesize / chip->ecc.size * chip->ecc.bytes;
 
-       if (layout->eccbytes > mtd->oobsize - 2) {
+       if (eccbytes > mtd->oobsize - 2) {
                dev_err(dev,
                        "invalid ECC config: required %d ECC bytes, but only %d are available",
-                       layout->eccbytes, mtd->oobsize - 2);
+                       eccbytes, mtd->oobsize - 2);
                return -EINVAL;
        }
 
-       start = mtd->oobsize - layout->eccbytes;
-       for (i = 0; i < layout->eccbytes; i++)
-               layout->eccpos[i] = start + i;
-
-       layout->oobfree[0].offset = 2;
-       layout->oobfree[0].length = mtd->oobsize - layout->eccbytes - 2;
+       mtd->ooblayout = &nand_ooblayout_lp_ops;
 
-       chip->ecc.layout = layout;
        return 0;
 }