ASoC: SOF: Intel: hda: Add definition for SDxFIFOS.FIFOS mask
authorPeter Ujfalusi <peter.ujfalusi@linux.intel.com>
Fri, 15 Sep 2023 11:40:16 +0000 (14:40 +0300)
committerMark Brown <broonie@kernel.org>
Fri, 15 Sep 2023 12:15:32 +0000 (13:15 +0100)
The FIFOS (FIFO Size) field is in bit 0-15 of the register.
Use the defined mask instead of a magic number for the FIFOS value
masking in hda_dsp_stream_hw_params().

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Reviewed-by: Chao Song <chao.song@linux.intel.com>
Link: https://lore.kernel.org/r/20230915114018.1701-3-peter.ujfalusi@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/sof/intel/hda-stream.c
sound/soc/sof/intel/hda.h

index 0b0087abcc50ed87e69fcde321f693a228e93a64..65e9242365bedb7f245e275f72bbb4e381b167db 100644 (file)
@@ -668,7 +668,7 @@ int hda_dsp_stream_hw_params(struct snd_sof_dev *sdev,
                        snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR,
                                         sd_offset +
                                         SOF_HDA_ADSP_REG_SD_FIFOSIZE);
-               hstream->fifo_size &= 0xffff;
+               hstream->fifo_size &= SOF_HDA_SD_FIFOSIZE_FIFOS_MASK;
                hstream->fifo_size += 1;
        } else {
                hstream->fifo_size = 0;
index 5c517ec57d4a2033cc5c8a116bbc86f928080ef7..2b228c63905bfdafd1078c55387039c86f041ead 100644 (file)
 #define SOF_HDA_ADSP_REG_SD_BDLPU              0x1C
 #define SOF_HDA_ADSP_SD_ENTRY_SIZE             0x20
 
+/* SDxFIFOS FIFOS */
+#define SOF_HDA_SD_FIFOSIZE_FIFOS_MASK         GENMASK(15, 0)
+
 /* CL: Software Position Based FIFO Capability Registers */
 #define SOF_DSP_REG_CL_SPBFIFO \
        (SOF_HDA_ADSP_LOADER_BASE + 0x20)