if (!qphy->pcs_misc)
                dev_vdbg(dev, "PHY pcs_misc-reg not used\n");
 
-       /*
-        * Get PHY's Pipe clock, if any. USB3 and PCIe are PIPE3
-        * based phys, so they essentially have pipe clock. So,
-        * we return error in case phy is USB3 or PIPE type.
-        * Otherwise, we initialize pipe clock to NULL for
-        * all phys that don't need this.
-        */
        snprintf(prop_name, sizeof(prop_name), "pipe%d", id);
        qphy->pipe_clk = devm_get_clk_from_child(dev, np, prop_name);
        if (IS_ERR(qphy->pipe_clk)) {
-               if (cfg->type == PHY_TYPE_PCIE ||
-                   cfg->type == PHY_TYPE_USB3) {
-                       ret = PTR_ERR(qphy->pipe_clk);
-                       if (ret != -EPROBE_DEFER)
-                               dev_err(dev,
-                                       "failed to get lane%d pipe_clk, %d\n",
-                                       id, ret);
-                       return ret;
-               }
-               qphy->pipe_clk = NULL;
+               return dev_err_probe(dev, PTR_ERR(qphy->pipe_clk),
+                                    "failed to get lane%d pipe clock\n", id);
        }
 
        /* Get lane reset, if any */