drm/msm/dpu: inline WB_BLK macros
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tue, 4 Jul 2023 02:21:33 +0000 (05:21 +0300)
committerDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tue, 11 Jul 2023 16:26:46 +0000 (19:26 +0300)
To simplify making changes to the hardware block definitions, expand
corresponding macros. This way making all the changes are more obvious
and visible in the source files.

Tested-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/545380/
Link: https://lore.kernel.org/r/20230704022136.130522-17-dmitry.baryshkov@linaro.org
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c

index b9ea2755eefa26339276b5b6e6f3d45f3727bf88..42c993ca1b2e2bfc73c58b618ee94fa595e09e03 100644 (file)
@@ -323,8 +323,18 @@ static const struct dpu_intf_cfg sm8250_intf[] = {
 };
 
 static const struct dpu_wb_cfg sm8250_wb[] = {
-       WB_BLK("wb_2", WB_2, 0x65000, WB_SM8250_MASK, DPU_CLK_CTRL_WB2, 6,
-                       VBIF_RT, MDP_SSPP_TOP0_INTR, 4096, 4),
+       {
+               .name = "wb_2", .id = WB_2,
+               .base = 0x65000, .len = 0x2c8,
+               .features = WB_SM8250_MASK,
+               .format_list = wb2_formats,
+               .num_formats = ARRAY_SIZE(wb2_formats),
+               .clk_ctrl = DPU_CLK_CTRL_WB2,
+               .xin_id = 6,
+               .vbif_idx = VBIF_RT,
+               .maxlinewidth = 4096,
+               .intr_wb_done = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 4),
+       },
 };
 
 static const struct dpu_perf_cfg sm8250_perf_data = {
index 652cf2f80dfbfb433dcb93dd5e04b136761f796e..387bddc85a84965d809d8edc007b5d32ad1f6f2d 100644 (file)
@@ -148,8 +148,18 @@ static const struct dpu_intf_cfg sc7180_intf[] = {
 };
 
 static const struct dpu_wb_cfg sc7180_wb[] = {
-       WB_BLK("wb_2", WB_2, 0x65000, WB_SM8250_MASK, DPU_CLK_CTRL_WB2, 6,
-                       VBIF_RT, MDP_SSPP_TOP0_INTR, 4096, 4),
+       {
+               .name = "wb_2", .id = WB_2,
+               .base = 0x65000, .len = 0x2c8,
+               .features = WB_SM8250_MASK,
+               .format_list = wb2_formats,
+               .num_formats = ARRAY_SIZE(wb2_formats),
+               .clk_ctrl = DPU_CLK_CTRL_WB2,
+               .xin_id = 6,
+               .vbif_idx = VBIF_RT,
+               .maxlinewidth = 4096,
+               .intr_wb_done = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 4),
+       },
 };
 
 static const struct dpu_perf_cfg sc7180_perf_data = {
index 8129a327c5754821951af86440986a6242d4d3c0..a775b357abcb2348d0cd70649dce65f1bb198153 100644 (file)
@@ -176,8 +176,18 @@ static const struct dpu_dsc_cfg sc7280_dsc[] = {
 };
 
 static const struct dpu_wb_cfg sc7280_wb[] = {
-       WB_BLK("wb_2", WB_2, 0x65000, WB_SM8250_MASK, DPU_CLK_CTRL_WB2, 6,
-                       VBIF_RT, MDP_SSPP_TOP0_INTR, 4096, 4),
+       {
+               .name = "wb_2", .id = WB_2,
+               .base = 0x65000, .len = 0x2c8,
+               .features = WB_SM8250_MASK,
+               .format_list = wb2_formats,
+               .num_formats = ARRAY_SIZE(wb2_formats),
+               .clk_ctrl = DPU_CLK_CTRL_WB2,
+               .xin_id = 6,
+               .vbif_idx = VBIF_RT,
+               .maxlinewidth = 4096,
+               .intr_wb_done = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 4),
+       },
 };
 
 static const struct dpu_intf_cfg sc7280_intf[] = {
index 5f56d87cbddabe31230ff24afc52c48d155bf191..d9558b01fe5f8cd175de03f919fe92b6cbf4c3ba 100644 (file)
@@ -493,24 +493,6 @@ static const struct dpu_dsc_sub_blks dsc_sblk_1 = {
        .intr_tear_rd_ptr = _tear_rd_ptr, \
        }
 
-/*************************************************************
- * Writeback blocks config
- *************************************************************/
-#define WB_BLK(_name, _id, _base, _features, _clk_ctrl, \
-               __xin_id, vbif_id, _reg, _max_linewidth, _wb_done_bit) \
-       { \
-       .name = _name, .id = _id, \
-       .base = _base, .len = 0x2c8, \
-       .features = _features, \
-       .format_list = wb2_formats, \
-       .num_formats = ARRAY_SIZE(wb2_formats), \
-       .clk_ctrl = _clk_ctrl, \
-       .xin_id = __xin_id, \
-       .vbif_idx = vbif_id, \
-       .maxlinewidth = _max_linewidth, \
-       .intr_wb_done = DPU_IRQ_IDX(_reg, _wb_done_bit) \
-       }
-
 /*************************************************************
  * VBIF sub blocks config
  *************************************************************/