ARM: dts: suniv: licheepi-nano: add SPI flash

Most LicheePi Nano boards come with soldered SPI flash, so enable SPI0
in the .dts and describe the flash chip. There is evidence of different
flash chips used, also of boards with no flash chip soldered, but the
Winbond 16MiB model is the most common, so use that for the compatible
string.  The actual flash chip model will be auto-detected at runtime
anyway.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20220317162349.739636-13-andre.przywara@arm.com

diff --git a/arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts b/arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts
index 8fa79a1d1d2d13cdf593f0688ee51e1d7581d42e..04e59b8381cb8b340d853ba019db8ae917df4732 100644 (file)
--- a/arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts
+++ b/arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts
@@ -13,6 +13,7 @@
        aliases {
                mmc0 = &mmc0;
                serial0 = &uart0;
+               spi0 = &spi0;
        };
 
        chosen {
@@ -35,6 +36,20 @@
        vmmc-supply = <&reg_vcc3v3>;
 };
 
+&spi0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&spi0_pc_pins>;
+       status = "okay";
+
+       flash@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "winbond,w25q128", "jedec,spi-nor";
+               reg = <0>;
+               spi-max-frequency = <40000000>;
+       };
+};
+
 &uart0 {
        pinctrl-names = "default";
        pinctrl-0 = <&uart0_pe_pins>;