drm/i915/mtl: Skip MCR ops for ring fault register

On MTL GEN12_RING_FAULT_REG is not replicated so don't
do mcr based operation for this register.

v2: use MEDIA_VER() instead of GRAPHICS_VER()(Matt).
v3: s/"MEDIA_VER(i915) == 13"/"MEDIA_VER(i915) >= 13"(Matt)
    improve comment.
v4: improve the comment further(Andi)

Signed-off-by: Nirmoy Das <nirmoy.das@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230928130015.6758-4-nirmoy.das@intel.com

diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
index bc0ead0b7a0a33e3dce2474d10976e1e05e24f11..9db97aa4d40c574f6c9e9753a52eee93507754fc 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -262,10 +262,21 @@ intel_gt_clear_error_registers(struct intel_gt *gt,
                                   I915_MASTER_ERROR_INTERRUPT);
        }
 
-       if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 50)) {
+       /*
+        * For the media GT, this ring fault register is not replicated,
+        * so don't do multicast/replicated register read/write operation on it.
+        */
+       if (MEDIA_VER(i915) >= 13 && gt->type == GT_MEDIA) {
+               intel_uncore_rmw(uncore, XELPMP_RING_FAULT_REG,
+                                RING_FAULT_VALID, 0);
+               intel_uncore_posting_read(uncore,
+                                         XELPMP_RING_FAULT_REG);
+
+       } else if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 50)) {
                intel_gt_mcr_multicast_rmw(gt, XEHP_RING_FAULT_REG,
                                           RING_FAULT_VALID, 0);
                intel_gt_mcr_read_any(gt, XEHP_RING_FAULT_REG);
+
        } else if (GRAPHICS_VER(i915) >= 12) {
                intel_uncore_rmw(uncore, GEN12_RING_FAULT_REG, RING_FAULT_VALID, 0);
                intel_uncore_posting_read(uncore, GEN12_RING_FAULT_REG);

diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
index cca4bac8f8b05c7debf386822a93fb8052bf5758..eecd0a87a64785be74a7c2d746879c1c4f71f279 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
@@ -1084,6 +1084,7 @@
 
 #define GEN12_RING_FAULT_REG                   _MMIO(0xcec4)
 #define XEHP_RING_FAULT_REG                    MCR_REG(0xcec4)
+#define XELPMP_RING_FAULT_REG                  _MMIO(0xcec4)
 #define   GEN8_RING_FAULT_ENGINE_ID(x)         (((x) >> 12) & 0x7)
 #define   RING_FAULT_GTTSEL_MASK               (1 << 11)
 #define   RING_FAULT_SRCID(x)                  (((x) >> 3) & 0xff)

diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index 4008bb09fdb5d85ab53867ee5a0413efb236448e..834c59786bacbe89245d119e9abf658319867e87 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -1234,7 +1234,16 @@ static void engine_record_registers(struct intel_engine_coredump *ee)
        if (GRAPHICS_VER(i915) >= 6) {
                ee->rc_psmi = ENGINE_READ(engine, RING_PSMI_CTL);
 
-               if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 50))
+               /*
+                * For the media GT, this ring fault register is not replicated,
+                * so don't do multicast/replicated register read/write
+                * operation on it.
+                */
+               if (MEDIA_VER(i915) >= 13 && engine->gt->type == GT_MEDIA)
+                       ee->fault_reg = intel_uncore_read(engine->uncore,
+                                                         XELPMP_RING_FAULT_REG);
+
+               else if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 50))
                        ee->fault_reg = intel_gt_mcr_read_any(engine->gt,
                                                              XEHP_RING_FAULT_REG);
                else if (GRAPHICS_VER(i915) >= 12)