ARM: dts: uniphier: add reset-names to NAND controller node

The Denali NAND controller IP has separate reset control for the
controller core and registers.

Add the reset-names, and one more phandle accordingly. This is the
approved DT-binding.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

diff --git a/arch/arm/boot/dts/uniphier-ld4.dtsi b/arch/arm/boot/dts/uniphier-ld4.dtsi
index 58cd4e8fa5beea9f03d7d8de17a7daa67eeab0ce..64ec46c72a4cc917c427454f987b0579509abd07 100644 (file)
--- a/arch/arm/boot/dts/uniphier-ld4.dtsi
+++ b/arch/arm/boot/dts/uniphier-ld4.dtsi
@@ -410,7 +410,8 @@
                        pinctrl-0 = <&pinctrl_nand>;
                        clock-names = "nand", "nand_x", "ecc";
                        clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
-                       resets = <&sys_rst 2>;
+                       reset-names = "nand", "reg";
+                       resets = <&sys_rst 2>, <&sys_rst 2>;
                };
        };
 };

diff --git a/arch/arm/boot/dts/uniphier-pro4.dtsi b/arch/arm/boot/dts/uniphier-pro4.dtsi
index 7f64e5a616d6bb687e0c5a44131baab708492c31..2ec04d7972efce1bbc25e2913a6ce2c4188f66ce 100644 (file)
--- a/arch/arm/boot/dts/uniphier-pro4.dtsi
+++ b/arch/arm/boot/dts/uniphier-pro4.dtsi
@@ -600,7 +600,8 @@
                        pinctrl-0 = <&pinctrl_nand>;
                        clock-names = "nand", "nand_x", "ecc";
                        clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
-                       resets = <&sys_rst 2>;
+                       reset-names = "nand", "reg";
+                       resets = <&sys_rst 2>, <&sys_rst 2>;
                };
        };
 };

diff --git a/arch/arm/boot/dts/uniphier-pro5.dtsi b/arch/arm/boot/dts/uniphier-pro5.dtsi
index eff74717b37c6ce29e8ffb0570ebfc3bb834e1de..ea3961f920a0bf4c18c5c9e6a6e6f109b53ce295 100644 (file)
--- a/arch/arm/boot/dts/uniphier-pro5.dtsi
+++ b/arch/arm/boot/dts/uniphier-pro5.dtsi
@@ -465,7 +465,8 @@
                        pinctrl-0 = <&pinctrl_nand>;
                        clock-names = "nand", "nand_x", "ecc";
                        clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
-                       resets = <&sys_rst 2>;
+                       reset-names = "nand", "reg";
+                       resets = <&sys_rst 2>, <&sys_rst 2>;
                };
 
                emmc: sdhc@68400000 {

diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi
index 4eddbb8d7fcac0a1ea8915b8553d5450ab767fb5..13b0d4a7741f3ec68099dd77dfb1f140afe5e19c 100644 (file)
--- a/arch/arm/boot/dts/uniphier-pxs2.dtsi
+++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi
@@ -773,7 +773,8 @@
                        pinctrl-0 = <&pinctrl_nand>;
                        clock-names = "nand", "nand_x", "ecc";
                        clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
-                       resets = <&sys_rst 2>;
+                       reset-names = "nand", "reg";
+                       resets = <&sys_rst 2>, <&sys_rst 2>;
                };
        };
 };

diff --git a/arch/arm/boot/dts/uniphier-sld8.dtsi b/arch/arm/boot/dts/uniphier-sld8.dtsi
index cbebb6e4c6167ee9b7a0e05f5b7a1e0e1a55a361..4fc6676f548693ddb18bbf1cbef51d9bc79e5685 100644 (file)
--- a/arch/arm/boot/dts/uniphier-sld8.dtsi
+++ b/arch/arm/boot/dts/uniphier-sld8.dtsi
@@ -414,7 +414,8 @@
                        pinctrl-0 = <&pinctrl_nand>;
                        clock-names = "nand", "nand_x", "ecc";
                        clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
-                       resets = <&sys_rst 2>;
+                       reset-names = "nand", "reg";
+                       resets = <&sys_rst 2>, <&sys_rst 2>;
                };
        };
 };