memory: Add LPDDR2-info helpers
authorDmitry Osipenko <digetx@gmail.com>
Wed, 6 Oct 2021 22:46:58 +0000 (01:46 +0300)
committerKrzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Fri, 15 Oct 2021 07:52:47 +0000 (09:52 +0200)
Add common helpers for reading and parsing standard LPDDR2 configuration
properties.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Link: https://lore.kernel.org/r/20211006224659.21434-9-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
drivers/memory/jedec_ddr.h
drivers/memory/jedec_ddr_data.c
drivers/memory/of_memory.c
drivers/memory/of_memory.h

index e59ccbd982d0254ef88eaef733a9103a777b293b..6cd508478b1468daa969193612640fc6c62e866a 100644 (file)
 #define NUM_DDR_ADDR_TABLE_ENTRIES                     11
 #define NUM_DDR_TIMING_TABLE_ENTRIES                   4
 
+#define LPDDR2_MANID_SAMSUNG                           1
+#define LPDDR2_MANID_QIMONDA                           2
+#define LPDDR2_MANID_ELPIDA                            3
+#define LPDDR2_MANID_ETRON                             4
+#define LPDDR2_MANID_NANYA                             5
+#define LPDDR2_MANID_HYNIX                             6
+#define LPDDR2_MANID_MOSEL                             7
+#define LPDDR2_MANID_WINBOND                           8
+#define LPDDR2_MANID_ESMT                              9
+#define LPDDR2_MANID_SPANSION                          11
+#define LPDDR2_MANID_SST                               12
+#define LPDDR2_MANID_ZMOS                              13
+#define LPDDR2_MANID_INTEL                             14
+#define LPDDR2_MANID_NUMONYX                           254
+#define LPDDR2_MANID_MICRON                            255
+
+#define LPDDR2_TYPE_S4                                 0
+#define LPDDR2_TYPE_S2                                 1
+#define LPDDR2_TYPE_NVM                                        2
+
 /* Structure for DDR addressing info from the JEDEC spec */
 struct lpddr2_addressing {
        u32 num_banks;
@@ -170,6 +190,33 @@ extern const struct lpddr2_timings
        lpddr2_jedec_timings[NUM_DDR_TIMING_TABLE_ENTRIES];
 extern const struct lpddr2_min_tck lpddr2_jedec_min_tck;
 
+/* Structure of MR8 */
+union lpddr2_basic_config4 {
+       u32 value;
+
+       struct {
+               unsigned int arch_type : 2;
+               unsigned int density : 4;
+               unsigned int io_width : 2;
+       } __packed;
+};
+
+/*
+ * Structure for information about LPDDR2 chip. All parameters are
+ * matching raw values of standard mode register bitfields or set to
+ * -ENOENT if info unavailable.
+ */
+struct lpddr2_info {
+       int arch_type;
+       int density;
+       int io_width;
+       int manufacturer_id;
+       int revision_id1;
+       int revision_id2;
+};
+
+const char *lpddr2_jedec_manufacturer(unsigned int manufacturer_id);
+
 /*
  * Structure for timings for LPDDR3 based on LPDDR2 plus additional fields.
  * All parameters are in pico seconds(ps) excluding max_freq, min_freq which
index ed601d813175e7c723c2022932cc9431b13907ec..2cca4fa188f927e824ae2a0d1f4c17d120bb9ca0 100644 (file)
@@ -131,3 +131,44 @@ const struct lpddr2_min_tck lpddr2_jedec_min_tck = {
        .tFAW           = 8
 };
 EXPORT_SYMBOL_GPL(lpddr2_jedec_min_tck);
+
+const char *lpddr2_jedec_manufacturer(unsigned int manufacturer_id)
+{
+       switch (manufacturer_id) {
+       case LPDDR2_MANID_SAMSUNG:
+               return "Samsung";
+       case LPDDR2_MANID_QIMONDA:
+               return "Qimonda";
+       case LPDDR2_MANID_ELPIDA:
+               return "Elpida";
+       case LPDDR2_MANID_ETRON:
+               return "Etron";
+       case LPDDR2_MANID_NANYA:
+               return "Nanya";
+       case LPDDR2_MANID_HYNIX:
+               return "Hynix";
+       case LPDDR2_MANID_MOSEL:
+               return "Mosel";
+       case LPDDR2_MANID_WINBOND:
+               return "Winbond";
+       case LPDDR2_MANID_ESMT:
+               return "ESMT";
+       case LPDDR2_MANID_SPANSION:
+               return "Spansion";
+       case LPDDR2_MANID_SST:
+               return "SST";
+       case LPDDR2_MANID_ZMOS:
+               return "ZMOS";
+       case LPDDR2_MANID_INTEL:
+               return "Intel";
+       case LPDDR2_MANID_NUMONYX:
+               return "Numonyx";
+       case LPDDR2_MANID_MICRON:
+               return "Micron";
+       default:
+               break;
+       }
+
+       return "invalid";
+}
+EXPORT_SYMBOL_GPL(lpddr2_jedec_manufacturer);
index d9f5437d3bce09e8124e16fa664539dc4b6948ed..b94408954d85cca3c4cb082c535156b41dc0cbe4 100644 (file)
@@ -298,3 +298,90 @@ default_timings:
        return NULL;
 }
 EXPORT_SYMBOL(of_lpddr3_get_ddr_timings);
+
+/**
+ * of_lpddr2_get_info() - extracts information about the lpddr2 chip.
+ * @np: Pointer to device tree node containing lpddr2 info
+ * @dev: Device requesting info
+ *
+ * Populates lpddr2_info structure by extracting data from device
+ * tree node. Returns pointer to populated structure. If error
+ * happened while populating, returns NULL. If property is missing
+ * in a device-tree, then the corresponding value is set to -ENOENT.
+ */
+const struct lpddr2_info
+*of_lpddr2_get_info(struct device_node *np, struct device *dev)
+{
+       struct lpddr2_info *ret_info, info = {};
+       struct property *prop;
+       const char *cp;
+       int err;
+
+       err = of_property_read_u32(np, "revision-id1", &info.revision_id1);
+       if (err)
+               info.revision_id1 = -ENOENT;
+
+       err = of_property_read_u32(np, "revision-id2", &info.revision_id2);
+       if (err)
+               info.revision_id2 = -ENOENT;
+
+       err = of_property_read_u32(np, "io-width", &info.io_width);
+       if (err)
+               return NULL;
+
+       info.io_width = 32 / info.io_width - 1;
+
+       err = of_property_read_u32(np, "density", &info.density);
+       if (err)
+               return NULL;
+
+       info.density = ffs(info.density) - 7;
+
+       if (of_device_is_compatible(np, "jedec,lpddr2-s4"))
+               info.arch_type = LPDDR2_TYPE_S4;
+       else if (of_device_is_compatible(np, "jedec,lpddr2-s2"))
+               info.arch_type = LPDDR2_TYPE_S2;
+       else if (of_device_is_compatible(np, "jedec,lpddr2-nvm"))
+               info.arch_type = LPDDR2_TYPE_NVM;
+       else
+               return NULL;
+
+       prop = of_find_property(np, "compatible", NULL);
+       for (cp = of_prop_next_string(prop, NULL); cp;
+            cp = of_prop_next_string(prop, cp)) {
+
+#define OF_LPDDR2_VENDOR_CMP(compat, ID) \
+               if (!of_compat_cmp(cp, compat ",", strlen(compat ","))) { \
+                       info.manufacturer_id = LPDDR2_MANID_##ID; \
+                       break; \
+               }
+
+               OF_LPDDR2_VENDOR_CMP("samsung", SAMSUNG)
+               OF_LPDDR2_VENDOR_CMP("qimonda", QIMONDA)
+               OF_LPDDR2_VENDOR_CMP("elpida", ELPIDA)
+               OF_LPDDR2_VENDOR_CMP("etron", ETRON)
+               OF_LPDDR2_VENDOR_CMP("nanya", NANYA)
+               OF_LPDDR2_VENDOR_CMP("hynix", HYNIX)
+               OF_LPDDR2_VENDOR_CMP("mosel", MOSEL)
+               OF_LPDDR2_VENDOR_CMP("winbond", WINBOND)
+               OF_LPDDR2_VENDOR_CMP("esmt", ESMT)
+               OF_LPDDR2_VENDOR_CMP("spansion", SPANSION)
+               OF_LPDDR2_VENDOR_CMP("sst", SST)
+               OF_LPDDR2_VENDOR_CMP("zmos", ZMOS)
+               OF_LPDDR2_VENDOR_CMP("intel", INTEL)
+               OF_LPDDR2_VENDOR_CMP("numonyx", NUMONYX)
+               OF_LPDDR2_VENDOR_CMP("micron", MICRON)
+
+#undef OF_LPDDR2_VENDOR_CMP
+       }
+
+       if (!info.manufacturer_id)
+               info.manufacturer_id = -ENOENT;
+
+       ret_info = devm_kzalloc(dev, sizeof(*ret_info), GFP_KERNEL);
+       if (ret_info)
+               *ret_info = info;
+
+       return ret_info;
+}
+EXPORT_SYMBOL(of_lpddr2_get_info);
index 4a99b232ab0a8fb3f32798c7f3c551d16b0226e2..1c4e47fede8aec3d1ad0205ec2e994f967086e7c 100644 (file)
@@ -20,6 +20,9 @@ const struct lpddr3_min_tck *of_lpddr3_get_min_tck(struct device_node *np,
 const struct lpddr3_timings *
 of_lpddr3_get_ddr_timings(struct device_node *np_ddr,
                          struct device *dev, u32 device_type, u32 *nr_frequencies);
+
+const struct lpddr2_info *of_lpddr2_get_info(struct device_node *np,
+                                            struct device *dev);
 #else
 static inline const struct lpddr2_min_tck
        *of_get_min_tck(struct device_node *np, struct device *dev)
@@ -46,6 +49,12 @@ static inline const struct lpddr3_timings
 {
        return NULL;
 }
+
+static inline const struct lpddr2_info
+       *of_lpddr2_get_info(struct device_node *np, struct device *dev)
+{
+       return NULL;
+}
 #endif /* CONFIG_OF && CONFIG_DDR */
 
 #endif /* __LINUX_MEMORY_OF_REG_ */