phy: qcom-qmp-pcie-msm8996: increase status polling period

It typically takes between one and two milliseconds for the PHY to
become ready after starting it. Increase the tight 3--10 us polling
period to the more reasonable 51--200 us.

Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20221012085002.24099-7-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie-msm8996.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie-msm8996.c
index b9260c8746bf0ea322ee61046b31d7ec0012d2a0..cd8fafe4c2956c51cc6b190468133896c2b63a79 100644 (file)
--- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie-msm8996.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie-msm8996.c
@@ -360,7 +360,7 @@ static int qmp_pcie_msm8996_serdes_init(struct qmp_phy *qphy)
                     SERDES_START | PCS_START);
 
        status = serdes + cfg->regs[QPHY_COM_PCS_READY_STATUS];
-       ret = readl_poll_timeout(status, val, (val & PCS_READY), 10,
+       ret = readl_poll_timeout(status, val, (val & PCS_READY), 200,
                                 PHY_INIT_COMPLETE_TIMEOUT);
        if (ret) {
                dev_err(qmp->dev,
@@ -514,7 +514,7 @@ static int qmp_pcie_msm8996_power_on(struct phy *phy)
        qphy_setbits(pcs, cfg->regs[QPHY_START_CTRL], cfg->start_ctrl);
 
        status = pcs + cfg->regs[QPHY_PCS_STATUS];
-       ret = readl_poll_timeout(status, val, !(val & PHYSTATUS), 10,
+       ret = readl_poll_timeout(status, val, !(val & PHYSTATUS), 200,
                                 PHY_INIT_COMPLETE_TIMEOUT);
        if (ret) {
                dev_err(qmp->dev, "phy initialization timed-out\n");