arm64: dts: qcom: msm8916: Add DMA for all I2C controllers
authorStephan Gerhold <stephan@gerhold.net>
Sat, 7 Jan 2023 11:09:58 +0000 (12:09 +0100)
committerBjorn Andersson <andersson@kernel.org>
Wed, 11 Jan 2023 19:35:55 +0000 (13:35 -0600)
i2c-qup allows using DMA to speed up larger transfers. In msm8916.dtsi
the DMA channels are already assigned to the SPI controllers but
missing for I2C. Add them there as well.

This also fixes confusing errors in dmesg for each I2C controller:
  i2c_qup 78b6000.i2c: tx channel not available

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230107110958.5762-3-stephan@gerhold.net
arch/arm64/boot/dts/qcom/msm8916.dtsi

index 6dbf5d6925e245c63beb20533ef6c7302b03c85b..cf248e10660b9a25af560dfb100cfb1d850e4c23 100644 (file)
                        clocks = <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>,
                                 <&gcc GCC_BLSP1_AHB_CLK>;
                        clock-names = "core", "iface";
+                       dmas = <&blsp_dma 4>, <&blsp_dma 5>;
+                       dma-names = "tx", "rx";
                        pinctrl-names = "default", "sleep";
                        pinctrl-0 = <&i2c1_default>;
                        pinctrl-1 = <&i2c1_sleep>;
                        clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>,
                                 <&gcc GCC_BLSP1_AHB_CLK>;
                        clock-names = "core", "iface";
+                       dmas = <&blsp_dma 6>, <&blsp_dma 7>;
+                       dma-names = "tx", "rx";
                        pinctrl-names = "default", "sleep";
                        pinctrl-0 = <&i2c2_default>;
                        pinctrl-1 = <&i2c2_sleep>;
                        clocks = <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>,
                                 <&gcc GCC_BLSP1_AHB_CLK>;
                        clock-names = "core", "iface";
+                       dmas = <&blsp_dma 8>, <&blsp_dma 9>;
+                       dma-names = "tx", "rx";
                        pinctrl-names = "default", "sleep";
                        pinctrl-0 = <&i2c3_default>;
                        pinctrl-1 = <&i2c3_sleep>;
                        clocks = <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>,
                                 <&gcc GCC_BLSP1_AHB_CLK>;
                        clock-names = "core", "iface";
+                       dmas = <&blsp_dma 10>, <&blsp_dma 11>;
+                       dma-names = "tx", "rx";
                        pinctrl-names = "default", "sleep";
                        pinctrl-0 = <&i2c4_default>;
                        pinctrl-1 = <&i2c4_sleep>;
                        clocks = <&gcc GCC_BLSP1_QUP5_I2C_APPS_CLK>,
                                 <&gcc GCC_BLSP1_AHB_CLK>;
                        clock-names = "core", "iface";
+                       dmas = <&blsp_dma 12>, <&blsp_dma 13>;
+                       dma-names = "tx", "rx";
                        pinctrl-names = "default", "sleep";
                        pinctrl-0 = <&i2c5_default>;
                        pinctrl-1 = <&i2c5_sleep>;
                        clocks = <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>,
                                 <&gcc GCC_BLSP1_AHB_CLK>;
                        clock-names = "core", "iface";
+                       dmas = <&blsp_dma 14>, <&blsp_dma 15>;
+                       dma-names = "tx", "rx";
                        pinctrl-names = "default", "sleep";
                        pinctrl-0 = <&i2c6_default>;
                        pinctrl-1 = <&i2c6_sleep>;