Signed-off-by: Joshua Aberback <joshua.aberback@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 };
 
 struct _vcs_dpi_ip_params_st {
+       bool use_min_dcfclk;
        bool gpuvm_enable;
        bool hostvm_enable;
        unsigned int gpuvm_max_page_table_levels;
 
        ip_params_st *ip = &mode_lib->vba.ip;
 
        // IP Parameters
+       mode_lib->vba.UseMinimumRequiredDCFCLK = ip->use_min_dcfclk;
        mode_lib->vba.MaxNumDPP = ip->max_num_dpp;
        mode_lib->vba.MaxNumOTG = ip->max_num_otg;
        mode_lib->vba.MaxNumHDMIFRLOutputs = ip->max_num_hdmi_frl_outputs;
 
        bool dummystring[DC__NUM_DPP__MAX];
        double BPP;
        enum odm_combine_policy ODMCombinePolicy;
+       bool UseMinimumRequiredDCFCLK;
 };
 
 bool CalculateMinAndMaxPrefetchMode(