media: verisilicon: Fixes clock list for rk3588 av1 decoder
authorBenjamin Gaignard <benjamin.gaignard@collabora.com>
Thu, 5 Oct 2023 14:51:16 +0000 (16:51 +0200)
committerHans Verkuil <hverkuil-cisco@xs4all.nl>
Fri, 13 Oct 2023 09:33:22 +0000 (11:33 +0200)
Mainlined RK3588 clock driver manage by itself the dependency between
aclk/hclk and their root clocks (aclk_vdpu_root/hclk_vdpu_root).
RK3588 av1 video decoder do not have to take care of it anymore so
remove them from the list and be compliant with yaml bindings description.

Fixes: 003afda97c65 ("media: verisilicon: Enable AV1 decoder on rk3588")
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
drivers/media/platform/verisilicon/rockchip_vpu_hw.c

index 816ffa905a4bb4e690f9b56217e312768a63c70c..f9752767078355ef0f76833c8caf9fba1068202b 100644 (file)
@@ -648,7 +648,7 @@ static const char * const rockchip_vpu_clk_names[] = {
 };
 
 static const char * const rk3588_vpu981_vpu_clk_names[] = {
-       "aclk", "hclk", "aclk_vdpu_root", "hclk_vdpu_root"
+       "aclk", "hclk",
 };
 
 /* VDPU1/VEPU1 */