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drm/i915/pmu: Check actual RC6 status
author
Tvrtko Ursulin
<tvrtko.ursulin@intel.com>
Wed, 31 Mar 2021 10:18:50 +0000
(11:18 +0100)
committer
Tvrtko Ursulin
<tvrtko.ursulin@intel.com>
Fri, 9 Apr 2021 13:49:15 +0000
(14:49 +0100)
RC6 support cannot be simply established by looking at the static device
HAS_RC6() flag. There are cases which disable RC6 at driver load time so
use the status of those check when deciding whether to enumerate the rc6
counter.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reported-by: Eero T Tamminen <eero.t.tamminen@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link:
https://patchwork.freedesktop.org/patch/msgid/20210331101850.2582027-1-tvrtko.ursulin@linux.intel.com
drivers/gpu/drm/i915/i915_pmu.c
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diff --git
a/drivers/gpu/drm/i915/i915_pmu.c
b/drivers/gpu/drm/i915/i915_pmu.c
index 41651ac255fabf4222d37008aec51fb2c3236d11..a75cd1db320bcd292a12e8c1836291bc23f2b4d7 100644
(file)
--- a/
drivers/gpu/drm/i915/i915_pmu.c
+++ b/
drivers/gpu/drm/i915/i915_pmu.c
@@
-476,6
+476,8
@@
engine_event_status(struct intel_engine_cs *engine,
static int
config_status(struct drm_i915_private *i915, u64 config)
{
+ struct intel_gt *gt = &i915->gt;
+
switch (config) {
case I915_PMU_ACTUAL_FREQUENCY:
if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
@@
-489,7
+491,7
@@
config_status(struct drm_i915_private *i915, u64 config)
case I915_PMU_INTERRUPTS:
break;
case I915_PMU_RC6_RESIDENCY:
- if (!
HAS_RC6(i915)
)
+ if (!
gt->rc6.supported
)
return -ENODEV;
break;
case I915_PMU_SOFTWARE_GT_AWAKE_TIME: