mlx5: fix possible ptp queue fifo use-after-free
authorVadim Fedorenko <vadfed@meta.com>
Thu, 2 Feb 2023 17:13:55 +0000 (09:13 -0800)
committerSaeed Mahameed <saeedm@nvidia.com>
Fri, 24 Feb 2023 18:13:18 +0000 (10:13 -0800)
Fifo indexes are not checked during pop operations and it leads to
potential use-after-free when poping from empty queue. Such case was
possible during re-sync action. WARN_ON_ONCE covers future cases.

There were out-of-order cqe spotted which lead to drain of the queue and
use-after-free because of lack of fifo pointers check. Special check and
counter are added to avoid resync operation if SKB could not exist in the
fifo because of OOO cqe (skb_id must be between consumer and producer
index).

Fixes: 58a518948f60 ("net/mlx5e: Add resiliency for PTP TX port timestamp")
Signed-off-by: Vadim Fedorenko <vadfed@meta.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
drivers/net/ethernet/mellanox/mlx5/core/en/ptp.c
drivers/net/ethernet/mellanox/mlx5/core/en/txrx.h
drivers/net/ethernet/mellanox/mlx5/core/en_stats.c
drivers/net/ethernet/mellanox/mlx5/core/en_stats.h

index 392db8d5e9c74ac68b93f8af3a30a6d66ce341a6..eb5aeba3addf495be4267d33e67bfca7c7c40c99 100644 (file)
@@ -86,6 +86,17 @@ static bool mlx5e_ptp_ts_cqe_drop(struct mlx5e_ptpsq *ptpsq, u16 skb_cc, u16 skb
        return (ptpsq->ts_cqe_ctr_mask && (skb_cc != skb_id));
 }
 
+static bool mlx5e_ptp_ts_cqe_ooo(struct mlx5e_ptpsq *ptpsq, u16 skb_id)
+{
+       u16 skb_cc = PTP_WQE_CTR2IDX(ptpsq->skb_fifo_cc);
+       u16 skb_pc = PTP_WQE_CTR2IDX(ptpsq->skb_fifo_pc);
+
+       if (PTP_WQE_CTR2IDX(skb_id - skb_cc) >= PTP_WQE_CTR2IDX(skb_pc - skb_cc))
+               return true;
+
+       return false;
+}
+
 static void mlx5e_ptp_skb_fifo_ts_cqe_resync(struct mlx5e_ptpsq *ptpsq, u16 skb_cc,
                                             u16 skb_id, int budget)
 {
@@ -120,8 +131,14 @@ static void mlx5e_ptp_handle_ts_cqe(struct mlx5e_ptpsq *ptpsq,
                goto out;
        }
 
-       if (mlx5e_ptp_ts_cqe_drop(ptpsq, skb_cc, skb_id))
+       if (mlx5e_ptp_ts_cqe_drop(ptpsq, skb_cc, skb_id)) {
+               if (mlx5e_ptp_ts_cqe_ooo(ptpsq, skb_id)) {
+                       /* already handled by a previous resync */
+                       ptpsq->cq_stats->ooo_cqe_drop++;
+                       return;
+               }
                mlx5e_ptp_skb_fifo_ts_cqe_resync(ptpsq, skb_cc, skb_id, budget);
+       }
 
        skb = mlx5e_skb_fifo_pop(&ptpsq->skb_fifo);
        hwtstamp = mlx5e_cqe_ts_to_ns(sq->ptp_cyc2time, sq->clock, get_cqe_ts(cqe));
index 2c10adbf18492039ba1067318d840469b0272307..b9c2f67d3794134fcf542af679f0d8cae51c87d1 100644 (file)
@@ -302,6 +302,8 @@ void mlx5e_skb_fifo_push(struct mlx5e_skb_fifo *fifo, struct sk_buff *skb)
 static inline
 struct sk_buff *mlx5e_skb_fifo_pop(struct mlx5e_skb_fifo *fifo)
 {
+       WARN_ON_ONCE(*fifo->pc == *fifo->cc);
+
        return *mlx5e_skb_fifo_get(fifo, (*fifo->cc)++);
 }
 
index 6687b8136e441e6ec1b7e9fcb7837946cb051b49..4478223c172094570d11be942c313eaba0761ae0 100644 (file)
@@ -2138,6 +2138,7 @@ static const struct counter_desc ptp_cq_stats_desc[] = {
        { MLX5E_DECLARE_PTP_CQ_STAT(struct mlx5e_ptp_cq_stats, abort_abs_diff_ns) },
        { MLX5E_DECLARE_PTP_CQ_STAT(struct mlx5e_ptp_cq_stats, resync_cqe) },
        { MLX5E_DECLARE_PTP_CQ_STAT(struct mlx5e_ptp_cq_stats, resync_event) },
+       { MLX5E_DECLARE_PTP_CQ_STAT(struct mlx5e_ptp_cq_stats, ooo_cqe_drop) },
 };
 
 static const struct counter_desc ptp_rq_stats_desc[] = {
index 375752d6546d5eecfec4906db576d02c27a80b09..b77100b60b5053db92117738433ffa1989fc6f4f 100644 (file)
@@ -461,6 +461,7 @@ struct mlx5e_ptp_cq_stats {
        u64 abort_abs_diff_ns;
        u64 resync_cqe;
        u64 resync_event;
+       u64 ooo_cqe_drop;
 };
 
 struct mlx5e_rep_stats {