ARM: dts: samsung: s5pv210: correct onenand size-cells
authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Wed, 13 Mar 2024 19:11:48 +0000 (20:11 +0100)
committerKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Mon, 25 Mar 2024 10:56:44 +0000 (11:56 +0100)
Children of NAND controllers have only chip select, so address without
the size.  Correct size-cells as reported by dtbs_check:

  s5pv210-galaxys.dtb: onenand@b0600000: #size-cells:0:0: 0 was expected

Link: https://lore.kernel.org/r/20240313191148.21792-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
arch/arm/boot/dts/samsung/s5pv210.dtsi

index 23459430410fe1cc4ae98d1d1d7583636da81ca8..9720573d84dcbdd78f7d09b6e300e9b41fe29aae 100644 (file)
@@ -82,7 +82,7 @@
                        clocks = <&clocks CLK_NANDXL>, <&clocks DOUT_FLASH>;
                        clock-names = "bus", "onenand";
                        #address-cells = <1>;
-                       #size-cells = <1>;
+                       #size-cells = <0>;
                        status = "disabled";
                };