Document the LP8756x-Q1 and LP87524-Q1 ICs reset pin.
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
description: I2C slave address
const: 0x60
+ reset-gpios:
+ description: GPIO connected to NRST pin (active low reset, pin 20)
+ maxItems: 1
+
gpio-controller: true
'#gpio-cells':
description: I2C slave address
const: 0x60
+ reset-gpios:
+ description: GPIO connected to NRST pin (active low reset, pin 20)
+ maxItems: 1
+
gpio-controller: true
'#gpio-cells':
description: I2C slave address
const: 0x60
+ reset-gpios:
+ description: GPIO connected to NRST pin (active low reset, pin 20)
+ maxItems: 1
+
gpio-controller: true
'#gpio-cells':