arm64: dts: renesas: r8a779f0: Add iommus to DMAC nodes

Add iommus properties to the DMAC nodes for r8a779f0.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20220530024626.1870277-3-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi
index c16dbde8f76ede6f09e7949808fa069144b5fb10..1a60a8e4b1bc75249088f02aee40261e2c3b7179 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi
@@ -318,6 +318,14 @@
                        resets = <&cpg 709>;
                        #dma-cells = <1>;
                        dma-channels = <16>;
+                       iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
+                                <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
+                                <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
+                                <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
+                                <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
+                                <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
+                                <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
+                                <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
                };
 
                dmac1: dma-controller@e7351000 {
@@ -353,6 +361,14 @@
                        resets = <&cpg 710>;
                        #dma-cells = <1>;
                        dma-channels = <16>;
+                       iommus = <&ipmmu_ds0 16>, <&ipmmu_ds0 17>,
+                                <&ipmmu_ds0 18>, <&ipmmu_ds0 19>,
+                                <&ipmmu_ds0 20>, <&ipmmu_ds0 21>,
+                                <&ipmmu_ds0 22>, <&ipmmu_ds0 23>,
+                                <&ipmmu_ds0 24>, <&ipmmu_ds0 25>,
+                                <&ipmmu_ds0 26>, <&ipmmu_ds0 27>,
+                                <&ipmmu_ds0 28>, <&ipmmu_ds0 29>,
+                                <&ipmmu_ds0 30>, <&ipmmu_ds0 31>;
                };
 
                ipmmu_rt0: iommu@ee480000 {