arm: dts: socfpga: Add clk-phase-sd-hs property to the sdmmc node

The sdmmc controller's CIU(Card Interface Unit) clock's phase can be
adjusted through the register in the system manager. Add the binding
"altr,sysmgr-syscon" to the SDMMC node for the driver to access the
system manager. Add the "clk-phase-sd-hs" property in the SDMMC node to
designate the smpsel and drvsel properties for the CIU clock.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>

diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 1d4a42cef48354ee6585c44764fdfc0b2eec95d8..6eda6fdc101bff088c8cced89bc8dedfbe34dde3 100644 (file)
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -764,6 +764,7 @@
                        clocks = <&l4_mp_clk>, <&sdmmc_clk_divided>;
                        clock-names = "biu", "ciu";
                        resets = <&rst SDMMC_RESET>;
+                       altr,sysmgr-syscon = <&sysmgr 0x108 3>;
                        status = "disabled";
                };
 

diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi
index cc7d4a62dde79a8eb99f643e5ba661850d86c53a..3b2a2c9c654731e1ba2f2bdd282fbae0663622ca 100644 (file)
--- a/arch/arm/boot/dts/socfpga_arria10.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
@@ -665,6 +665,7 @@
                        clocks = <&l4_mp_clk>, <&sdmmc_clk>;
                        clock-names = "biu", "ciu";
                        resets = <&rst SDMMC_RESET>;
+                       altr,sysmgr-syscon = <&sysmgr 0x28 4>;
                        status = "disabled";
                };
 

diff --git a/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dtsi b/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dtsi
index ad7cd14de6b68fb3ac72399df6e55c93abd3791e..41f865c8c09858431ca28bb25fce806fce6134b3 100644 (file)
--- a/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dtsi
@@ -73,6 +73,7 @@
        cap-sd-highspeed;
        broken-cd;
        bus-width = <4>;
+       clk-phase-sd-hs = <0>, <135>;
 };
 
 &osc1 {

diff --git a/arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts b/arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts
index 64dc0799f3d763f7bee548b644b841acc7ca2aa0..d3969367f4b509c59997b288d31bb65a937108db 100644 (file)
--- a/arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts
+++ b/arch/arm/boot/dts/socfpga_arria10_socdk_sdmmc.dts
@@ -12,6 +12,7 @@
        cap-mmc-highspeed;
        broken-cd;
        bus-width = <4>;
+       clk-phase-sd-hs = <0>, <135>;
 };
 
 &eccmgr {

diff --git a/arch/arm/boot/dts/socfpga_arria5.dtsi b/arch/arm/boot/dts/socfpga_arria5.dtsi
index d27e94a1f61f21d722efe6266d1d6037fe50763b..40fecde65c54d52a51442c762494273db9da2445 100644 (file)
--- a/arch/arm/boot/dts/socfpga_arria5.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria5.dtsi
@@ -23,6 +23,7 @@
                        bus-width = <4>;
                        cap-mmc-highspeed;
                        cap-sd-highspeed;
+                       clk-phase-sd-hs = <0>, <135>;
                };
 
                sysmgr@ffd08000 {

diff --git a/arch/arm/boot/dts/socfpga_cyclone5.dtsi b/arch/arm/boot/dts/socfpga_cyclone5.dtsi
index 20f114445f487ac904db21323064fa92d0a3a1e3..305fe207b237cccd42ba9b9845d7d52cc7101c26 100644 (file)
--- a/arch/arm/boot/dts/socfpga_cyclone5.dtsi
+++ b/arch/arm/boot/dts/socfpga_cyclone5.dtsi
@@ -23,6 +23,7 @@
                        bus-width = <4>;
                        cap-mmc-highspeed;
                        cap-sd-highspeed;
+                       clk-phase-sd-hs = <0>, <135>;
                };
 
                sysmgr@ffd08000 {

diff --git a/arch/arm/boot/dts/socfpga_cyclone5_mcv.dtsi b/arch/arm/boot/dts/socfpga_cyclone5_mcv.dtsi
index bd92806ffc12828ac326033bc563a4508325ecc5..3b9daddf91cd235af7e24456840cf721f2c6a369 100644 (file)
--- a/arch/arm/boot/dts/socfpga_cyclone5_mcv.dtsi
+++ b/arch/arm/boot/dts/socfpga_cyclone5_mcv.dtsi
@@ -18,5 +18,6 @@
 
 &mmc0 {        /* On-SoM eMMC */
        bus-width = <8>;
+       clk-phase-sd-hs = <0>, <135>;
        status = "okay";
 };