firmware: qcom_scm: Move qcom_scm.h to include/linux/firmware/qcom/
authorElliot Berman <quic_eberman@quicinc.com>
Fri, 3 Feb 2023 21:09:52 +0000 (13:09 -0800)
committerBjorn Andersson <andersson@kernel.org>
Thu, 9 Feb 2023 03:15:16 +0000 (19:15 -0800)
Move include/linux/qcom_scm.h to include/linux/firmware/qcom/qcom_scm.h.
This removes 1 of a few remaining Qualcomm-specific headers into a more
approciate subdirectory under include/.

Suggested-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Elliot Berman <quic_eberman@quicinc.com>
Reviewed-by: Guru Das Srinagesh <quic_gurus@quicinc.com>
Acked-by: Mukesh Ojha <quic_mojha@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230203210956.3580811-1-quic_eberman@quicinc.com
27 files changed:
arch/arm/mach-qcom/platsmp.c
drivers/cpuidle/cpuidle-qcom-spm.c
drivers/firmware/qcom_scm-legacy.c
drivers/firmware/qcom_scm-smc.c
drivers/firmware/qcom_scm.c
drivers/gpu/drm/msm/adreno/a5xx_gpu.c
drivers/gpu/drm/msm/adreno/adreno_gpu.c
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
drivers/iommu/arm/arm-smmu/arm-smmu-qcom-debug.c
drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
drivers/iommu/arm/arm-smmu/qcom_iommu.c
drivers/media/platform/qcom/venus/firmware.c
drivers/misc/fastrpc.c
drivers/mmc/host/sdhci-msm.c
drivers/net/ipa/ipa_main.c
drivers/net/wireless/ath/ath10k/qmi.c
drivers/pinctrl/qcom/pinctrl-msm.c
drivers/remoteproc/qcom_q6v5_mss.c
drivers/remoteproc/qcom_q6v5_pas.c
drivers/remoteproc/qcom_wcnss.c
drivers/soc/qcom/mdt_loader.c
drivers/soc/qcom/ocmem.c
drivers/soc/qcom/rmtfs_mem.c
drivers/thermal/qcom/lmh.c
drivers/ufs/host/ufs-qcom-ice.c
include/linux/firmware/qcom/qcom_scm.h [new file with mode: 0644]
include/linux/qcom_scm.h [deleted file]

index 5d2f386a46d8745b2515aa0655d7fc58618df485..eca2fe0f4314b12e6e1220e9409afabbedca2f94 100644 (file)
@@ -14,7 +14,7 @@
 #include <linux/of_address.h>
 #include <linux/smp.h>
 #include <linux/io.h>
-#include <linux/qcom_scm.h>
+#include <linux/firmware/qcom/qcom_scm.h>
 
 #include <asm/smp_plat.h>
 
index beedf22cbe78b21d3982065d89020e8f24cc363f..4ac83918edf291ee152fba81a1b32456a6f8df99 100644 (file)
@@ -17,7 +17,7 @@
 #include <linux/platform_device.h>
 #include <linux/cpuidle.h>
 #include <linux/cpu_pm.h>
-#include <linux/qcom_scm.h>
+#include <linux/firmware/qcom/qcom_scm.h>
 #include <soc/qcom/spm.h>
 
 #include <asm/proc-fns.h>
index 9f918b9e6f8f68b786a0910067b97a42c8135728..029e6d117cb8d2b5ef82e75cb05731fe545d41db 100644 (file)
@@ -9,7 +9,7 @@
 #include <linux/mutex.h>
 #include <linux/errno.h>
 #include <linux/err.h>
-#include <linux/qcom_scm.h>
+#include <linux/firmware/qcom/qcom_scm.h>
 #include <linux/arm-smccc.h>
 #include <linux/dma-mapping.h>
 
index bb3235a64b8f0e7b22a1aa2af7b445e3ef586335..16cf88acfa8ee01a70dd58f4f24408311bdc205c 100644 (file)
@@ -8,7 +8,7 @@
 #include <linux/mutex.h>
 #include <linux/slab.h>
 #include <linux/types.h>
-#include <linux/qcom_scm.h>
+#include <linux/firmware/qcom/qcom_scm.h>
 #include <linux/arm-smccc.h>
 #include <linux/dma-mapping.h>
 
index 2000323722bf9061a1c96043260477939f880100..468d4d5ab550c91cfa415418cc5333746dc596c8 100644 (file)
@@ -12,7 +12,7 @@
 #include <linux/interconnect.h>
 #include <linux/module.h>
 #include <linux/types.h>
-#include <linux/qcom_scm.h>
+#include <linux/firmware/qcom/qcom_scm.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
index 660ba0db8900255d42ba253749cb50114e6acfa6..d09221f97f71c38f64b38b5fe12a55ddfb95bc64 100644 (file)
@@ -5,7 +5,7 @@
 #include <linux/kernel.h>
 #include <linux/types.h>
 #include <linux/cpumask.h>
-#include <linux/qcom_scm.h>
+#include <linux/firmware/qcom/qcom_scm.h>
 #include <linux/pm_opp.h>
 #include <linux/nvmem-consumer.h>
 #include <linux/slab.h>
index 57586c794b84bde8c012594e1422a66dc5021e3d..89ff978b81bb874d9f0a4fa8196834361ef2b426 100644 (file)
@@ -8,7 +8,7 @@
 
 #include <linux/ascii85.h>
 #include <linux/interconnect.h>
-#include <linux/qcom_scm.h>
+#include <linux/firmware/qcom/qcom_scm.h>
 #include <linux/kernel.h>
 #include <linux/of_address.h>
 #include <linux/pm_opp.h>
index e7748461cffcff92479efd59fcdd7f454dfec636..0752fe373351474678259fbb37ed0c4461c0a95c 100644 (file)
@@ -3,7 +3,7 @@
  */
 
 #include "hdmi.h"
-#include <linux/qcom_scm.h>
+#include <linux/firmware/qcom/qcom_scm.h>
 
 #define HDCP_REG_ENABLE 0x01
 #define HDCP_REG_DISABLE 0x00
index 74e9ef2fd5804fcf933e918983ad4ca7d1698aac..b5b14108e086a9ac107ea265ec90dcdad91b5d85 100644 (file)
@@ -4,7 +4,7 @@
  */
 
 #include <linux/of_device.h>
-#include <linux/qcom_scm.h>
+#include <linux/firmware/qcom/qcom_scm.h>
 #include <linux/ratelimit.h>
 
 #include "arm-smmu.h"
index 91d404deb1155880c4667e72cca527bcbbeb2008..ef42329e82ced161c045ff084b9e7ce9d0126033 100644 (file)
@@ -7,7 +7,7 @@
 #include <linux/adreno-smmu-priv.h>
 #include <linux/delay.h>
 #include <linux/of_device.h>
-#include <linux/qcom_scm.h>
+#include <linux/firmware/qcom/qcom_scm.h>
 
 #include "arm-smmu.h"
 #include "arm-smmu-qcom.h"
index 270c3d9128bab874585f9e90a46ad09c524acc41..1e0b7b2e9fbdd79572b20126c47045d8a43cd62c 100644 (file)
@@ -27,7 +27,7 @@
 #include <linux/platform_device.h>
 #include <linux/pm.h>
 #include <linux/pm_runtime.h>
-#include <linux/qcom_scm.h>
+#include <linux/firmware/qcom/qcom_scm.h>
 #include <linux/slab.h>
 #include <linux/spinlock.h>
 
index 142d4c74017c04148c7ab11305f0bb208a022617..e5759d7e9ede5ecc6bc8e9c5cc2a7d0fac477b15 100644 (file)
@@ -12,7 +12,7 @@
 #include <linux/of_address.h>
 #include <linux/platform_device.h>
 #include <linux/of_device.h>
-#include <linux/qcom_scm.h>
+#include <linux/firmware/qcom/qcom_scm.h>
 #include <linux/sizes.h>
 #include <linux/soc/qcom/mdt_loader.h>
 
index c9902a1dcf5d311043182ee87f4dbc5ec6085cae..04f80e754477ca43adf2305ccc96bdcb3f1b3e5f 100644 (file)
@@ -18,7 +18,7 @@
 #include <linux/rpmsg.h>
 #include <linux/scatterlist.h>
 #include <linux/slab.h>
-#include <linux/qcom_scm.h>
+#include <linux/firmware/qcom/qcom_scm.h>
 #include <uapi/misc/fastrpc.h>
 #include <linux/of_reserved_mem.h>
 
index 4ac8651d0b2992cbf1bd003d40a819c11aa245f5..8ac81d57a3dfe5ceffb767cdab0449a5998ac5d1 100644 (file)
@@ -13,7 +13,7 @@
 #include <linux/pm_opp.h>
 #include <linux/slab.h>
 #include <linux/iopoll.h>
-#include <linux/qcom_scm.h>
+#include <linux/firmware/qcom/qcom_scm.h>
 #include <linux/regulator/consumer.h>
 #include <linux/interconnect.h>
 #include <linux/pinctrl/consumer.h>
index 4fb92f7719741762dc4c090c33515ab7788f1aec..90baf7a54d9afef32d3effc5d99963fbf12af056 100644 (file)
@@ -16,7 +16,7 @@
 #include <linux/of_device.h>
 #include <linux/of_address.h>
 #include <linux/pm_runtime.h>
-#include <linux/qcom_scm.h>
+#include <linux/firmware/qcom/qcom_scm.h>
 #include <linux/soc/qcom/mdt_loader.h>
 
 #include "ipa.h"
index 3f94fbf83702ce1c372a39c1030165212efe642f..90f457b8e1feb8df6a9718fd411054bfc55f3e21 100644 (file)
@@ -13,7 +13,7 @@
 #include <linux/module.h>
 #include <linux/net.h>
 #include <linux/platform_device.h>
-#include <linux/qcom_scm.h>
+#include <linux/firmware/qcom/qcom_scm.h>
 #include <linux/soc/qcom/smem.h>
 #include <linux/string.h>
 #include <net/sock.h>
index 47e9a8b0d4744fdb9f89ea78c88521fcb200b77e..e0128c69bfbf346b5ad8c050549b26c1681d774e 100644 (file)
@@ -14,7 +14,7 @@
 #include <linux/of.h>
 #include <linux/platform_device.h>
 #include <linux/pm.h>
-#include <linux/qcom_scm.h>
+#include <linux/firmware/qcom/qcom_scm.h>
 #include <linux/reboot.h>
 #include <linux/seq_file.h>
 #include <linux/slab.h>
index fddb63cffee0781f23e7c88e951cb164dac0012b..da2513bb6387267a760142630f7e6957ab9c43c0 100644 (file)
@@ -34,7 +34,7 @@
 #include "qcom_pil_info.h"
 #include "qcom_q6v5.h"
 
-#include <linux/qcom_scm.h>
+#include <linux/firmware/qcom/qcom_scm.h>
 
 #define MPSS_CRASH_REASON_SMEM         421
 
index dc6f07ca83410fe26f5c8f4b28d4a89f58a334aa..d5a04966961618600f2d17e024fba39aa1235cf5 100644 (file)
@@ -18,7 +18,7 @@
 #include <linux/platform_device.h>
 #include <linux/pm_domain.h>
 #include <linux/pm_runtime.h>
-#include <linux/qcom_scm.h>
+#include <linux/firmware/qcom/qcom_scm.h>
 #include <linux/regulator/consumer.h>
 #include <linux/remoteproc.h>
 #include <linux/soc/qcom/mdt_loader.h>
index 68f37296b1516c0b0ea89e1586575f55bd78c731..9881443cb8df419dcfda9fd8c8d95f1fef4dc896 100644 (file)
@@ -19,7 +19,7 @@
 #include <linux/platform_device.h>
 #include <linux/pm_domain.h>
 #include <linux/pm_runtime.h>
-#include <linux/qcom_scm.h>
+#include <linux/firmware/qcom/qcom_scm.h>
 #include <linux/regulator/consumer.h>
 #include <linux/remoteproc.h>
 #include <linux/soc/qcom/mdt_loader.h>
index 3f11554df2f38091434eedb5045f80ac795c1ffe..33dd8c315eb73ca888a5f7c62f69da78b7b18c94 100644 (file)
@@ -12,7 +12,7 @@
 #include <linux/firmware.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
-#include <linux/qcom_scm.h>
+#include <linux/firmware/qcom/qcom_scm.h>
 #include <linux/sizes.h>
 #include <linux/slab.h>
 #include <linux/soc/qcom/mdt_loader.h>
index c92d26b73e6fc700d4264e851f3030c4c68726ac..199fe9872035098d790cace43a800018bc6a5ee0 100644 (file)
@@ -16,7 +16,7 @@
 #include <linux/module.h>
 #include <linux/of_device.h>
 #include <linux/platform_device.h>
-#include <linux/qcom_scm.h>
+#include <linux/firmware/qcom/qcom_scm.h>
 #include <linux/sizes.h>
 #include <linux/slab.h>
 #include <linux/types.h>
index 9d59ad509a5c742488c1efbb1c2ffc6fe674641e..2d3ee22b924943c33d41cc6b11f9a79ed0206512 100644 (file)
@@ -14,7 +14,7 @@
 #include <linux/slab.h>
 #include <linux/uaccess.h>
 #include <linux/io.h>
-#include <linux/qcom_scm.h>
+#include <linux/firmware/qcom/qcom_scm.h>
 
 #define QCOM_RMTFS_MEM_DEV_MAX (MINORMASK + 1)
 #define NUM_MAX_VMIDS          2
index 4122a51e987414bf3c12bce3c83fc1b95c33b35d..f6edb12ec00419768354ea55eddb8fa2e711ed4d 100644 (file)
@@ -10,7 +10,7 @@
 #include <linux/platform_device.h>
 #include <linux/of_platform.h>
 #include <linux/slab.h>
-#include <linux/qcom_scm.h>
+#include <linux/firmware/qcom/qcom_scm.h>
 
 #define LMH_NODE_DCVS                  0x44435653
 #define LMH_CLUSTER0_NODE_ID           0x6370302D
index 62387ccd5b3072515b0998ca2a5fd827e40a36f5..453978877ae969f8489f8d14baf80fe3111e6f2d 100644 (file)
@@ -8,7 +8,7 @@
 
 #include <linux/delay.h>
 #include <linux/platform_device.h>
-#include <linux/qcom_scm.h>
+#include <linux/firmware/qcom/qcom_scm.h>
 
 #include "ufs-qcom.h"
 
diff --git a/include/linux/firmware/qcom/qcom_scm.h b/include/linux/firmware/qcom/qcom_scm.h
new file mode 100644 (file)
index 0000000..1e449a5
--- /dev/null
@@ -0,0 +1,125 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/* Copyright (c) 2010-2015, 2018-2019 The Linux Foundation. All rights reserved.
+ * Copyright (C) 2015 Linaro Ltd.
+ */
+#ifndef __QCOM_SCM_H
+#define __QCOM_SCM_H
+
+#include <linux/err.h>
+#include <linux/types.h>
+#include <linux/cpumask.h>
+
+#include <dt-bindings/firmware/qcom,scm.h>
+
+#define QCOM_SCM_VERSION(major, minor) (((major) << 16) | ((minor) & 0xFF))
+#define QCOM_SCM_CPU_PWR_DOWN_L2_ON    0x0
+#define QCOM_SCM_CPU_PWR_DOWN_L2_OFF   0x1
+#define QCOM_SCM_HDCP_MAX_REQ_CNT      5
+
+struct qcom_scm_hdcp_req {
+       u32 addr;
+       u32 val;
+};
+
+struct qcom_scm_vmperm {
+       int vmid;
+       int perm;
+};
+
+enum qcom_scm_ocmem_client {
+       QCOM_SCM_OCMEM_UNUSED_ID = 0x0,
+       QCOM_SCM_OCMEM_GRAPHICS_ID,
+       QCOM_SCM_OCMEM_VIDEO_ID,
+       QCOM_SCM_OCMEM_LP_AUDIO_ID,
+       QCOM_SCM_OCMEM_SENSORS_ID,
+       QCOM_SCM_OCMEM_OTHER_OS_ID,
+       QCOM_SCM_OCMEM_DEBUG_ID,
+};
+
+enum qcom_scm_sec_dev_id {
+       QCOM_SCM_MDSS_DEV_ID    = 1,
+       QCOM_SCM_OCMEM_DEV_ID   = 5,
+       QCOM_SCM_PCIE0_DEV_ID   = 11,
+       QCOM_SCM_PCIE1_DEV_ID   = 12,
+       QCOM_SCM_GFX_DEV_ID     = 18,
+       QCOM_SCM_UFS_DEV_ID     = 19,
+       QCOM_SCM_ICE_DEV_ID     = 20,
+};
+
+enum qcom_scm_ice_cipher {
+       QCOM_SCM_ICE_CIPHER_AES_128_XTS = 0,
+       QCOM_SCM_ICE_CIPHER_AES_128_CBC = 1,
+       QCOM_SCM_ICE_CIPHER_AES_256_XTS = 3,
+       QCOM_SCM_ICE_CIPHER_AES_256_CBC = 4,
+};
+
+#define QCOM_SCM_PERM_READ       0x4
+#define QCOM_SCM_PERM_WRITE      0x2
+#define QCOM_SCM_PERM_EXEC       0x1
+#define QCOM_SCM_PERM_RW (QCOM_SCM_PERM_READ | QCOM_SCM_PERM_WRITE)
+#define QCOM_SCM_PERM_RWX (QCOM_SCM_PERM_RW | QCOM_SCM_PERM_EXEC)
+
+extern bool qcom_scm_is_available(void);
+
+extern int qcom_scm_set_cold_boot_addr(void *entry);
+extern int qcom_scm_set_warm_boot_addr(void *entry);
+extern void qcom_scm_cpu_power_down(u32 flags);
+extern int qcom_scm_set_remote_state(u32 state, u32 id);
+
+struct qcom_scm_pas_metadata {
+       void *ptr;
+       dma_addr_t phys;
+       ssize_t size;
+};
+
+extern int qcom_scm_pas_init_image(u32 peripheral, const void *metadata,
+                                  size_t size,
+                                  struct qcom_scm_pas_metadata *ctx);
+void qcom_scm_pas_metadata_release(struct qcom_scm_pas_metadata *ctx);
+extern int qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr,
+                                 phys_addr_t size);
+extern int qcom_scm_pas_auth_and_reset(u32 peripheral);
+extern int qcom_scm_pas_shutdown(u32 peripheral);
+extern bool qcom_scm_pas_supported(u32 peripheral);
+
+extern int qcom_scm_io_readl(phys_addr_t addr, unsigned int *val);
+extern int qcom_scm_io_writel(phys_addr_t addr, unsigned int val);
+
+extern bool qcom_scm_restore_sec_cfg_available(void);
+extern int qcom_scm_restore_sec_cfg(u32 device_id, u32 spare);
+extern int qcom_scm_iommu_secure_ptbl_size(u32 spare, size_t *size);
+extern int qcom_scm_iommu_secure_ptbl_init(u64 addr, u32 size, u32 spare);
+extern int qcom_scm_iommu_set_cp_pool_size(u32 spare, u32 size);
+extern int qcom_scm_mem_protect_video_var(u32 cp_start, u32 cp_size,
+                                         u32 cp_nonpixel_start,
+                                         u32 cp_nonpixel_size);
+extern int qcom_scm_assign_mem(phys_addr_t mem_addr, size_t mem_sz,
+                              unsigned int *src,
+                              const struct qcom_scm_vmperm *newvm,
+                              unsigned int dest_cnt);
+
+extern bool qcom_scm_ocmem_lock_available(void);
+extern int qcom_scm_ocmem_lock(enum qcom_scm_ocmem_client id, u32 offset,
+                              u32 size, u32 mode);
+extern int qcom_scm_ocmem_unlock(enum qcom_scm_ocmem_client id, u32 offset,
+                                u32 size);
+
+extern bool qcom_scm_ice_available(void);
+extern int qcom_scm_ice_invalidate_key(u32 index);
+extern int qcom_scm_ice_set_key(u32 index, const u8 *key, u32 key_size,
+                               enum qcom_scm_ice_cipher cipher,
+                               u32 data_unit_size);
+
+extern bool qcom_scm_hdcp_available(void);
+extern int qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt,
+                            u32 *resp);
+
+extern int qcom_scm_iommu_set_pt_format(u32 sec_id, u32 ctx_num, u32 pt_fmt);
+extern int qcom_scm_qsmmu500_wait_safe_toggle(bool en);
+
+extern int qcom_scm_lmh_dcvsh(u32 payload_fn, u32 payload_reg, u32 payload_val,
+                             u64 limit_node, u32 node_id, u64 version);
+extern int qcom_scm_lmh_profile_change(u32 profile_id);
+extern bool qcom_scm_lmh_dcvsh_available(void);
+
+#endif
diff --git a/include/linux/qcom_scm.h b/include/linux/qcom_scm.h
deleted file mode 100644 (file)
index 1e449a5..0000000
+++ /dev/null
@@ -1,125 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/* Copyright (c) 2010-2015, 2018-2019 The Linux Foundation. All rights reserved.
- * Copyright (C) 2015 Linaro Ltd.
- */
-#ifndef __QCOM_SCM_H
-#define __QCOM_SCM_H
-
-#include <linux/err.h>
-#include <linux/types.h>
-#include <linux/cpumask.h>
-
-#include <dt-bindings/firmware/qcom,scm.h>
-
-#define QCOM_SCM_VERSION(major, minor) (((major) << 16) | ((minor) & 0xFF))
-#define QCOM_SCM_CPU_PWR_DOWN_L2_ON    0x0
-#define QCOM_SCM_CPU_PWR_DOWN_L2_OFF   0x1
-#define QCOM_SCM_HDCP_MAX_REQ_CNT      5
-
-struct qcom_scm_hdcp_req {
-       u32 addr;
-       u32 val;
-};
-
-struct qcom_scm_vmperm {
-       int vmid;
-       int perm;
-};
-
-enum qcom_scm_ocmem_client {
-       QCOM_SCM_OCMEM_UNUSED_ID = 0x0,
-       QCOM_SCM_OCMEM_GRAPHICS_ID,
-       QCOM_SCM_OCMEM_VIDEO_ID,
-       QCOM_SCM_OCMEM_LP_AUDIO_ID,
-       QCOM_SCM_OCMEM_SENSORS_ID,
-       QCOM_SCM_OCMEM_OTHER_OS_ID,
-       QCOM_SCM_OCMEM_DEBUG_ID,
-};
-
-enum qcom_scm_sec_dev_id {
-       QCOM_SCM_MDSS_DEV_ID    = 1,
-       QCOM_SCM_OCMEM_DEV_ID   = 5,
-       QCOM_SCM_PCIE0_DEV_ID   = 11,
-       QCOM_SCM_PCIE1_DEV_ID   = 12,
-       QCOM_SCM_GFX_DEV_ID     = 18,
-       QCOM_SCM_UFS_DEV_ID     = 19,
-       QCOM_SCM_ICE_DEV_ID     = 20,
-};
-
-enum qcom_scm_ice_cipher {
-       QCOM_SCM_ICE_CIPHER_AES_128_XTS = 0,
-       QCOM_SCM_ICE_CIPHER_AES_128_CBC = 1,
-       QCOM_SCM_ICE_CIPHER_AES_256_XTS = 3,
-       QCOM_SCM_ICE_CIPHER_AES_256_CBC = 4,
-};
-
-#define QCOM_SCM_PERM_READ       0x4
-#define QCOM_SCM_PERM_WRITE      0x2
-#define QCOM_SCM_PERM_EXEC       0x1
-#define QCOM_SCM_PERM_RW (QCOM_SCM_PERM_READ | QCOM_SCM_PERM_WRITE)
-#define QCOM_SCM_PERM_RWX (QCOM_SCM_PERM_RW | QCOM_SCM_PERM_EXEC)
-
-extern bool qcom_scm_is_available(void);
-
-extern int qcom_scm_set_cold_boot_addr(void *entry);
-extern int qcom_scm_set_warm_boot_addr(void *entry);
-extern void qcom_scm_cpu_power_down(u32 flags);
-extern int qcom_scm_set_remote_state(u32 state, u32 id);
-
-struct qcom_scm_pas_metadata {
-       void *ptr;
-       dma_addr_t phys;
-       ssize_t size;
-};
-
-extern int qcom_scm_pas_init_image(u32 peripheral, const void *metadata,
-                                  size_t size,
-                                  struct qcom_scm_pas_metadata *ctx);
-void qcom_scm_pas_metadata_release(struct qcom_scm_pas_metadata *ctx);
-extern int qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr,
-                                 phys_addr_t size);
-extern int qcom_scm_pas_auth_and_reset(u32 peripheral);
-extern int qcom_scm_pas_shutdown(u32 peripheral);
-extern bool qcom_scm_pas_supported(u32 peripheral);
-
-extern int qcom_scm_io_readl(phys_addr_t addr, unsigned int *val);
-extern int qcom_scm_io_writel(phys_addr_t addr, unsigned int val);
-
-extern bool qcom_scm_restore_sec_cfg_available(void);
-extern int qcom_scm_restore_sec_cfg(u32 device_id, u32 spare);
-extern int qcom_scm_iommu_secure_ptbl_size(u32 spare, size_t *size);
-extern int qcom_scm_iommu_secure_ptbl_init(u64 addr, u32 size, u32 spare);
-extern int qcom_scm_iommu_set_cp_pool_size(u32 spare, u32 size);
-extern int qcom_scm_mem_protect_video_var(u32 cp_start, u32 cp_size,
-                                         u32 cp_nonpixel_start,
-                                         u32 cp_nonpixel_size);
-extern int qcom_scm_assign_mem(phys_addr_t mem_addr, size_t mem_sz,
-                              unsigned int *src,
-                              const struct qcom_scm_vmperm *newvm,
-                              unsigned int dest_cnt);
-
-extern bool qcom_scm_ocmem_lock_available(void);
-extern int qcom_scm_ocmem_lock(enum qcom_scm_ocmem_client id, u32 offset,
-                              u32 size, u32 mode);
-extern int qcom_scm_ocmem_unlock(enum qcom_scm_ocmem_client id, u32 offset,
-                                u32 size);
-
-extern bool qcom_scm_ice_available(void);
-extern int qcom_scm_ice_invalidate_key(u32 index);
-extern int qcom_scm_ice_set_key(u32 index, const u8 *key, u32 key_size,
-                               enum qcom_scm_ice_cipher cipher,
-                               u32 data_unit_size);
-
-extern bool qcom_scm_hdcp_available(void);
-extern int qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt,
-                            u32 *resp);
-
-extern int qcom_scm_iommu_set_pt_format(u32 sec_id, u32 ctx_num, u32 pt_fmt);
-extern int qcom_scm_qsmmu500_wait_safe_toggle(bool en);
-
-extern int qcom_scm_lmh_dcvsh(u32 payload_fn, u32 payload_reg, u32 payload_val,
-                             u64 limit_node, u32 node_id, u64 version);
-extern int qcom_scm_lmh_profile_change(u32 profile_id);
-extern bool qcom_scm_lmh_dcvsh_available(void);
-
-#endif