arm64: dts: qcom: sm8250: camss: Define ports and ports address/size cells

Define the set of possible ports, one for each CSI PHY along with the port
address and size cells @ the SoC dtsi level.

Suggested-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Suggested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221117003232.589734-7-bryan.odonoghue@linaro.org

diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index b9dd1facf7d5fd6d0610aa6b61c8d1f518842f46..c1201eb967a5a743befecac886a05077a8083f32 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -3908,6 +3908,35 @@
                                             "cam_hf_0_mnoc",
                                             "cam_sf_0_mnoc",
                                             "cam_sf_icp_mnoc";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@0 {
+                                       reg = <0>;
+                               };
+
+                               port@1 {
+                                       reg = <1>;
+                               };
+
+                               port@2 {
+                                       reg = <2>;
+                               };
+
+                               port@3 {
+                                       reg = <3>;
+                               };
+
+                               port@4 {
+                                       reg = <4>;
+                               };
+
+                               port@5 {
+                                       reg = <5>;
+                               };
+                       };
                };
 
                camcc: clock-controller@ad00000 {