arm64: dts: qcom: sm8450: Add video clock controller

Add device node for video clock controller on Qualcomm SM8450 platform.

Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230524140656.7076-4-quic_tdas@quicinc.com

diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 6de3327d9b32a2e46b4e1163c77bb87dbb048605..174a23bd3e589ad2a016676b9d8a8c09dc6fc63e 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -8,6 +8,7 @@
 #include <dt-bindings/clock/qcom,rpmh.h>
 #include <dt-bindings/clock/qcom,sm8450-camcc.h>
 #include <dt-bindings/clock/qcom,sm8450-dispcc.h>
+#include <dt-bindings/clock/qcom,sm8450-videocc.h>
 #include <dt-bindings/dma/qcom-gpi.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/mailbox/qcom-ipcc.h>
@@ -2598,6 +2599,18 @@
                        };
                };
 
+               videocc: clock-controller@aaf0000 {
+                       compatible = "qcom,sm8450-videocc";
+                       reg = <0 0x0aaf0000 0 0x10000>;
+                       clocks = <&rpmhcc RPMH_CXO_CLK>,
+                                <&gcc GCC_VIDEO_AHB_CLK>;
+                       power-domains = <&rpmhpd SM8450_MMCX>;
+                       required-opps = <&rpmhpd_opp_low_svs>;
+                       #clock-cells = <1>;
+                       #reset-cells = <1>;
+                       #power-domain-cells = <1>;
+               };
+
                cci0: cci@ac15000 {
                        compatible = "qcom,sm8450-cci", "qcom,msm8996-cci";
                        reg = <0 0x0ac15000 0 0x1000>;