clk: at91: pmc: Save SCSR during suspend
authorRomain Izard <romain.izard.pro@gmail.com>
Mon, 11 Dec 2017 16:55:34 +0000 (17:55 +0100)
committerStephen Boyd <sboyd@codeaurora.org>
Fri, 22 Dec 2017 00:34:05 +0000 (16:34 -0800)
The contents of the System Clock Status Register (SCSR) needs to be
restored into the System Clock Enable Register (SCER).

As the bootloader will restore some clocks by itself, the issue can be
missed as only the USB controller, the LCD controller, the Image Sensor
controller and the programmable clocks will be impacted.

Fix the obvious typo in the suspend/resume code, as the IMR register
does not need to be saved twice.

Signed-off-by: Romain Izard <romain.izard.pro@gmail.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
drivers/clk/at91/pmc.c

index 5c2b26de303e887c8c853e4e4aff206eca10a471..07dc2861ad3f13168ea802e55614a0c8352cb486 100644 (file)
@@ -86,7 +86,7 @@ static int pmc_suspend(void)
 {
        int i;
 
-       regmap_read(pmcreg, AT91_PMC_IMR, &pmc_cache.scsr);
+       regmap_read(pmcreg, AT91_PMC_SCSR, &pmc_cache.scsr);
        regmap_read(pmcreg, AT91_PMC_PCSR, &pmc_cache.pcsr0);
        regmap_read(pmcreg, AT91_CKGR_UCKR, &pmc_cache.uckr);
        regmap_read(pmcreg, AT91_CKGR_MOR, &pmc_cache.mor);
@@ -129,7 +129,7 @@ static void pmc_resume(void)
        if (pmc_cache.pllar != tmp)
                pr_warn("PLLAR was not configured properly by the firmware\n");
 
-       regmap_write(pmcreg, AT91_PMC_IMR, pmc_cache.scsr);
+       regmap_write(pmcreg, AT91_PMC_SCER, pmc_cache.scsr);
        regmap_write(pmcreg, AT91_PMC_PCER, pmc_cache.pcsr0);
        regmap_write(pmcreg, AT91_CKGR_UCKR, pmc_cache.uckr);
        regmap_write(pmcreg, AT91_CKGR_MOR, pmc_cache.mor);