net: dsa: felix: allow flooding for all traffic classes

Right now it can be seen that the VSC9959 (Felix) switch will not flood
frames if they have a VLAN tag with a PCP of 1-7 (nonzero).

It turns out that Felix is quite different from its cousin, Ocelot, in
that frame flooding can be allowed/denied per traffic class. Where
Ocelot has 1 instance of the ANA_FLOODING register, Felix has 8.

The approach that this driver is going to take is "thanks, but no
thanks". We have no use case of limiting the flooding domain based on
traffic class, so we just want to allow packets to be flooded, no matter
what traffic class they have.

So we copy the line of code from ocelot.c which does the one-shot
initialization of the flooding PGIDs, and we add it to felix.c as well -
except replicated 8 times.

Signed-off-by: Xiaoliang Yang <xiaoliang.yang_1@nxp.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/dsa/ocelot/felix.c b/drivers/net/dsa/ocelot/felix.c
index 9173b95551d12ea961c136ec28141b066c72579c..8a633ddce6c5a91c30464895baa4f34150cfb5c0 100644 (file)
--- a/drivers/net/dsa/ocelot/felix.c
+++ b/drivers/net/dsa/ocelot/felix.c
@@ -522,6 +522,7 @@ static int felix_setup(struct dsa_switch *ds)
        struct ocelot *ocelot = ds->priv;
        struct felix *felix = ocelot_to_felix(ocelot);
        int port, err;
+       int tc;
 
        err = felix_init_structs(felix, ds->num_ports);
        if (err)
@@ -555,6 +556,12 @@ static int felix_setup(struct dsa_switch *ds)
        ocelot_write_rix(ocelot,
                         ANA_PGID_PGID_PGID(GENMASK(ocelot->num_phys_ports, 0)),
                         ANA_PGID_PGID, PGID_UC);
+       /* Setup the per-traffic class flooding PGIDs */
+       for (tc = 0; tc < FELIX_NUM_TC; tc++)
+               ocelot_write_rix(ocelot, ANA_FLOODING_FLD_MULTICAST(PGID_MC) |
+                                ANA_FLOODING_FLD_BROADCAST(PGID_MC) |
+                                ANA_FLOODING_FLD_UNICAST(PGID_UC),
+                                ANA_FLOODING, tc);
 
        ds->mtu_enforcement_ingress = true;
        /* It looks like the MAC/PCS interrupt register - PM0_IEVENT (0x8040)

diff --git a/drivers/net/dsa/ocelot/felix.h b/drivers/net/dsa/ocelot/felix.h
index 82d46f2600418882df9140fad975a66b54dabff0..2ad793c0e1df519d5eef3f407783c14e9ecf40e6 100644 (file)
--- a/drivers/net/dsa/ocelot/felix.h
+++ b/drivers/net/dsa/ocelot/felix.h
@@ -5,6 +5,7 @@
 #define _MSCC_FELIX_H
 
 #define ocelot_to_felix(o)             container_of((o), struct felix, ocelot)
+#define FELIX_NUM_TC                   8
 
 /* Platform-specific information */
 struct felix_info {