crypto: hisilicon/sec - adds the max shaper type rate
authorKai Ye <yekai13@huawei.com>
Fri, 11 Jun 2021 09:06:48 +0000 (17:06 +0800)
committerHerbert Xu <herbert@gondor.apana.org.au>
Thu, 17 Jun 2021 07:07:32 +0000 (15:07 +0800)
The SEC driver support configure each function's QoS in the Host
for Kunpeng930. The SEC driver needs to configure the maximum shaper
type rate.

Signed-off-by: Kai Ye <yekai13@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
drivers/crypto/hisilicon/sec2/sec_main.c

index 8ab4e67b8a417bff17723b16258c51bb6603013d..d120ce3e34eda9d60d6ad18ae73f885c587a2db3 100644 (file)
@@ -98,6 +98,7 @@
 
 #define SEC_SQE_MASK_OFFSET            64
 #define SEC_SQE_MASK_LEN               48
+#define SEC_SHAPER_TYPE_RATE           128
 
 struct sec_hw_error {
        u32 int_msk;
@@ -874,6 +875,7 @@ static void sec_qm_uninit(struct hisi_qm *qm)
 
 static int sec_probe_init(struct sec_dev *sec)
 {
+       u32 type_rate = SEC_SHAPER_TYPE_RATE;
        struct hisi_qm *qm = &sec->qm;
        int ret;
 
@@ -881,6 +883,11 @@ static int sec_probe_init(struct sec_dev *sec)
                ret = sec_pf_probe_init(sec);
                if (ret)
                        return ret;
+               /* enable shaper type 0 */
+               if (qm->ver >= QM_HW_V3) {
+                       type_rate |= QM_SHAPER_ENABLE;
+                       qm->type_rate = type_rate;
+               }
        }
 
        return 0;