drm/i915: Modernize i9xx_pll_refclk()
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 12 Apr 2024 18:26:57 +0000 (21:26 +0300)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Wed, 17 Apr 2024 13:57:50 +0000 (16:57 +0300)
Drop the redundant 'dev' argument from i9xx_pll_refclk()
and rename its variables to conform to modern standards.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240412182703.19916-13-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
drivers/gpu/drm/i915/display/intel_dpll.c

index 43d36ea56798e27bda8733a55615e39dc5bf69b9..5246b8a8d461c46536e2f0b07b42ac92f6904b94 100644 (file)
@@ -369,17 +369,16 @@ int chv_calc_dpll_params(int refclk, struct dpll *clock)
        return clock->dot;
 }
 
-static int i9xx_pll_refclk(struct drm_device *dev,
-                          const struct intel_crtc_state *pipe_config)
+static int i9xx_pll_refclk(const struct intel_crtc_state *crtc_state)
 {
-       struct drm_i915_private *dev_priv = to_i915(dev);
-       u32 dpll = pipe_config->dpll_hw_state.dpll;
+       struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev);
+       u32 dpll = crtc_state->dpll_hw_state.dpll;
 
        if ((dpll & PLL_REF_INPUT_MASK) == PLLB_REF_INPUT_SPREADSPECTRUMIN)
-               return dev_priv->display.vbt.lvds_ssc_freq;
-       else if (HAS_PCH_SPLIT(dev_priv))
+               return i915->display.vbt.lvds_ssc_freq;
+       else if (HAS_PCH_SPLIT(i915))
                return 120000;
-       else if (DISPLAY_VER(dev_priv) != 2)
+       else if (DISPLAY_VER(i915) != 2)
                return 96000;
        else
                return 48000;
@@ -425,7 +424,7 @@ void i9xx_crtc_clock_get(struct intel_crtc *crtc,
        u32 fp;
        struct dpll clock;
        int port_clock;
-       int refclk = i9xx_pll_refclk(dev, pipe_config);
+       int refclk = i9xx_pll_refclk(pipe_config);
 
        if ((dpll & DISPLAY_RATE_SELECT_FPA1) == 0)
                fp = pipe_config->dpll_hw_state.fp0;