arm64: dts: ti: k3-am65: DMA support

Add the ringacc and udmap nodes for main and mcu NAVSS.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>

diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
index c21315c43c5562a2e1b4ed645f2f84649a9e3d20..7c4853a8a02cc0e6d2420a29c300f2edab494c3b 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
@@ -379,6 +379,10 @@
                #address-cells = <2>;
                #size-cells = <2>;
                ranges;
+               dma-coherent;
+               dma-ranges;
+
+               ti,sci-dev-id = <118>;
 
                intr_main_navss: interrupt-controller1 {
                        compatible = "ti,sci-intr";
@@ -527,6 +531,41 @@
                        ti,mbox-num-fifos = <16>;
                        interrupt-parent = <&intr_main_navss>;
                };
+
+               ringacc: ringacc@3c000000 {
+                       compatible = "ti,am654-navss-ringacc";
+                       reg =   <0x0 0x3c000000 0x0 0x400000>,
+                               <0x0 0x38000000 0x0 0x400000>,
+                               <0x0 0x31120000 0x0 0x100>,
+                               <0x0 0x33000000 0x0 0x40000>;
+                       reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
+                       ti,num-rings = <818>;
+                       ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */
+                       ti,dma-ring-reset-quirk;
+                       ti,sci = <&dmsc>;
+                       ti,sci-dev-id = <187>;
+                       msi-parent = <&inta_main_udmass>;
+               };
+
+               main_udmap: dma-controller@31150000 {
+                       compatible = "ti,am654-navss-main-udmap";
+                       reg =   <0x0 0x31150000 0x0 0x100>,
+                               <0x0 0x34000000 0x0 0x100000>,
+                               <0x0 0x35000000 0x0 0x100000>;
+                       reg-names = "gcfg", "rchanrt", "tchanrt";
+                       msi-parent = <&inta_main_udmass>;
+                       #dma-cells = <1>;
+
+                       ti,sci = <&dmsc>;
+                       ti,sci-dev-id = <188>;
+                       ti,ringacc = <&ringacc>;
+
+                       ti,sci-rm-range-tchan = <0x1>, /* TX_HCHAN */
+                                               <0x2>; /* TX_CHAN */
+                       ti,sci-rm-range-rchan = <0x4>, /* RX_HCHAN */
+                                               <0x5>; /* RX_CHAN */
+                       ti,sci-rm-range-rflow = <0x6>; /* GP RFLOW */
+               };
        };
 
        main_gpio0:  main_gpio0@600000 {

diff --git a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
index 319e821b3c27344bbbdfb2d0a2c97445d7294f9c..92629cbdc1844e3e8dfd448ff1a980f122840870 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
@@ -104,6 +104,52 @@
                };
        };
 
+       mcu_navss {
+               compatible = "simple-mfd";
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+               dma-coherent;
+               dma-ranges;
+
+               ti,sci-dev-id = <119>;
+
+               mcu_ringacc: ringacc@2b800000 {
+                       compatible = "ti,am654-navss-ringacc";
+                       reg =   <0x0 0x2b800000 0x0 0x400000>,
+                               <0x0 0x2b000000 0x0 0x400000>,
+                               <0x0 0x28590000 0x0 0x100>,
+                               <0x0 0x2a500000 0x0 0x40000>;
+                       reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
+                       ti,num-rings = <286>;
+                       ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */
+                       ti,dma-ring-reset-quirk;
+                       ti,sci = <&dmsc>;
+                       ti,sci-dev-id = <195>;
+                       msi-parent = <&inta_main_udmass>;
+               };
+
+               mcu_udmap: dma-controller@285c0000 {
+                       compatible = "ti,am654-navss-mcu-udmap";
+                       reg =   <0x0 0x285c0000 0x0 0x100>,
+                               <0x0 0x2a800000 0x0 0x40000>,
+                               <0x0 0x2aa00000 0x0 0x40000>;
+                       reg-names = "gcfg", "rchanrt", "tchanrt";
+                       msi-parent = <&inta_main_udmass>;
+                       #dma-cells = <1>;
+
+                       ti,sci = <&dmsc>;
+                       ti,sci-dev-id = <194>;
+                       ti,ringacc = <&mcu_ringacc>;
+
+                       ti,sci-rm-range-tchan = <0x1>, /* TX_HCHAN */
+                                               <0x2>; /* TX_CHAN */
+                       ti,sci-rm-range-rchan = <0x3>, /* RX_HCHAN */
+                                               <0x4>; /* RX_CHAN */
+                       ti,sci-rm-range-rflow = <0x5>; /* GP RFLOW */
+               };
+       };
+
        fss: fss@47000000 {
                compatible = "simple-bus";
                #address-cells = <2>;