dt-bindings: imx6q-pcie: Add PHY phandles and name properties
authorRichard Zhu <hongxing.zhu@nxp.com>
Thu, 2 Dec 2021 08:02:33 +0000 (16:02 +0800)
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Thu, 16 Dec 2021 10:32:19 +0000 (10:32 +0000)
i.MX8MM PCIe has the PHY. Add a PHY phandle and name properties
in the binding document.

Link: https://lore.kernel.org/r/1638432158-4119-4-git-send-email-hongxing.zhu@nxp.com
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml

index acea1cd444fd52490450405bceb5d063e955ab2c..643a6333b07b5cea494ea62cc0375e3ad0db63d4 100644 (file)
@@ -127,6 +127,12 @@ properties:
     enum: [1, 2, 3, 4]
     default: 1
 
+  phys:
+    maxItems: 1
+
+  phy-names:
+    const: pcie-phy
+
   reset-gpio:
     description: Should specify the GPIO for controlling the PCI bus device
       reset signal. It's not polarity aware and defaults to active-low reset