ARM: dts: nuvoton: Modify clock parameters

Modify NPCM7xx device tree clock parameter to clock constants that
define at include/dt-bindings/clock/nuvoton,npcm7xx-clock.h file.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20200929131807.15378-2-tmaimon77@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>

diff --git a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
index d2d0761295a4fd3ada432602dc0fb39363cf4902..16a28c5c41316dec19a592c567423be794e93a39 100644 (file)
--- a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
+++ b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
@@ -3,6 +3,7 @@
 // Copyright 2018 Google, Inc.
 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/nuvoton,npcm7xx-clock.h>
 
 / {
        #address-cells = <1>;
@@ -80,7 +81,7 @@
                        interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
                        cache-unified;
                        cache-level = <2>;
-                       clocks = <&clk 10>;
+                       clocks = <&clk NPCM7XX_CLK_AXI>;
                        arm,shared-override;
                };
 
@@ -120,7 +121,7 @@
                                compatible = "nuvoton,npcm750-timer";
                                interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
                                reg = <0x8000 0x50>;
-                               clocks = <&clk 5>;
+                               clocks = <&clk NPCM7XX_CLK_TIMER>;
                        };
 
                        watchdog0: watchdog@801C {
@@ -128,7 +129,7 @@
                                interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
                                reg = <0x801C 0x4>;
                                status = "disabled";
-                               clocks = <&clk 5>;
+                               clocks = <&clk NPCM7XX_CLK_TIMER>;
                        };
 
                        watchdog1: watchdog@901C {
@@ -136,7 +137,7 @@
                                interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
                                reg = <0x901C 0x4>;
                                status = "disabled";
-                               clocks = <&clk 5>;
+                               clocks = <&clk NPCM7XX_CLK_TIMER>;
                        };
 
                        watchdog2: watchdog@a01C {
@@ -144,13 +145,13 @@
                                interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
                                reg = <0xa01C 0x4>;
                                status = "disabled";
-                               clocks = <&clk 5>;
+                               clocks = <&clk NPCM7XX_CLK_TIMER>;
                        };
 
                        serial0: serial@1000 {
                                compatible = "nuvoton,npcm750-uart";
                                reg = <0x1000 0x1000>;
-                               clocks = <&clk 6>;
+                               clocks = <&clk NPCM7XX_CLK_UART>;
                                interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
                                reg-shift = <2>;
                                status = "disabled";
@@ -159,7 +160,7 @@
                        serial1: serial@2000 {
                                compatible = "nuvoton,npcm750-uart";
                                reg = <0x2000 0x1000>;
-                               clocks = <&clk 6>;
+                               clocks = <&clk NPCM7XX_CLK_UART>;
                                interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
                                reg-shift = <2>;
                                status = "disabled";
@@ -168,7 +169,7 @@
                        serial2: serial@3000 {
                                compatible = "nuvoton,npcm750-uart";
                                reg = <0x3000 0x1000>;
-                               clocks = <&clk 6>;
+                               clocks = <&clk NPCM7XX_CLK_UART>;
                                interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
                                reg-shift = <2>;
                                status = "disabled";
@@ -177,7 +178,7 @@
                        serial3: serial@4000 {
                                compatible = "nuvoton,npcm750-uart";
                                reg = <0x4000 0x1000>;
-                               clocks = <&clk 6>;
+                               clocks = <&clk NPCM7XX_CLK_UART>;
                                interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
                                reg-shift = <2>;
                                status = "disabled";

diff --git a/arch/arm/boot/dts/nuvoton-npcm750.dtsi b/arch/arm/boot/dts/nuvoton-npcm750.dtsi
index 6ac34053358737342eb68949e7bf0b552ba0d270..a37bb2294b8f60ebe5220e49399618afe54b5001 100644 (file)
--- a/arch/arm/boot/dts/nuvoton-npcm750.dtsi
+++ b/arch/arm/boot/dts/nuvoton-npcm750.dtsi
@@ -17,7 +17,7 @@
                cpu@0 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
-                       clocks = <&clk 0>;
+                       clocks = <&clk NPCM7XX_CLK_CPU>;
                        clock-names = "clk_cpu";
                        reg = <0>;
                        next-level-cache = <&l2>;
@@ -26,7 +26,7 @@
                cpu@1 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
-                       clocks = <&clk 0>;
+                       clocks = <&clk NPCM7XX_CLK_CPU>;
                        clock-names = "clk_cpu";
                        reg = <1>;
                        next-level-cache = <&l2>;
@@ -38,7 +38,7 @@
                        reg = <0x3fe600 0x20>;
                        interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
                                                  IRQ_TYPE_LEVEL_HIGH)>;
-                       clocks = <&clk 5>;
+                       clocks = <&clk NPCM7XX_CLK_AHB>;
                };
        };
 };