struct meson_pwm *meson = to_meson_pwm(chip);
        struct meson_pwm_channel *channel = &meson->channels[pwm->hwpwm];
        unsigned int cnt, duty_cnt;
-       unsigned long fin_freq;
+       long fin_freq;
        u64 duty, period, freq;
 
        duty = state->duty_cycle;
                freq = ULONG_MAX;
 
        fin_freq = clk_round_rate(channel->clk, freq);
-       if (fin_freq == 0) {
-               dev_err(pwmchip_parent(chip), "invalid source clock frequency\n");
-               return -EINVAL;
+       if (fin_freq <= 0) {
+               dev_err(pwmchip_parent(chip),
+                       "invalid source clock frequency %llu\n", freq);
+               return fin_freq ? fin_freq : -EINVAL;
        }
 
-       dev_dbg(pwmchip_parent(chip), "fin_freq: %lu Hz\n", fin_freq);
+       dev_dbg(pwmchip_parent(chip), "fin_freq: %ld Hz\n", fin_freq);
 
        cnt = div_u64(fin_freq * period, NSEC_PER_SEC);
        if (cnt > 0xffff) {