drm/amdgpu/mes10.1: implement querying the scheduler status

The routine is implemented to generate mes command
to query the status of hardware scheduler.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c b/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c
index bd986e5fa474bc77c30551a831e871598a480c64..27374561ff4dd655777c74327fac2ebf67bd3660 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c
@@ -197,6 +197,25 @@ static int mes_v10_1_resume_gang(struct amdgpu_mes *mes,
        return 0;
 }
 
+static int mes_v10_1_query_sched_status(struct amdgpu_mes *mes)
+{
+       union MESAPI__QUERY_MES_STATUS mes_status_pkt;
+
+       memset(&mes_status_pkt, 0, sizeof(mes_status_pkt));
+
+       mes_status_pkt.header.type = MES_API_TYPE_SCHEDULER;
+       mes_status_pkt.header.opcode = MES_SCH_API_QUERY_SCHEDULER_STATUS;
+       mes_status_pkt.header.dwsize = API_FRAME_SIZE_IN_DWORDS;
+
+       mes_status_pkt.api_status.api_completion_fence_addr =
+               mes->ring.fence_drv.gpu_addr;
+       mes_status_pkt.api_status.api_completion_fence_value =
+               ++mes->ring.fence_drv.sync_seq;
+
+       return mes_v10_1_submit_pkt_and_poll_completion(mes,
+                       &mes_status_pkt, sizeof(mes_status_pkt));
+}
+
 static const struct amdgpu_mes_funcs mes_v10_1_funcs = {
        .add_hw_queue = mes_v10_1_add_hw_queue,
        .remove_hw_queue = mes_v10_1_remove_hw_queue,