ARM: dts: rockchip: swap timer clock-names
authorJohan Jonker <jbx6244@gmail.com>
Sat, 28 Aug 2021 10:26:59 +0000 (12:26 +0200)
committerHeiko Stuebner <heiko@sntech.de>
Mon, 20 Sep 2021 13:22:48 +0000 (15:22 +0200)
With the conversion of rockchip,rk-timer.yaml the clock-names order
was set to "pclk", "timer", but nothing was fixed in the ARM dts section
of the mainline kernel, so the swap timer clock-names that don't fit.

make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/timer/rockchip,rk-timer.yaml

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210828102659.7348-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm/boot/dts/rk3036.dtsi
arch/arm/boot/dts/rk322x.dtsi
arch/arm/boot/dts/rv1108.dtsi

index ffa9bc7ed3d04eb6cf3e87218ef49968a50f4864..6864b8668ec034f9cd1d0d4ae8c61b356df01691 100644 (file)
                compatible = "rockchip,rk3036-timer", "rockchip,rk3288-timer";
                reg = <0x20044000 0x20>;
                interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
-               clocks = <&xin24m>, <&cru PCLK_TIMER>;
-               clock-names = "timer", "pclk";
+               clocks = <&cru PCLK_TIMER>, <&xin24m>;
+               clock-names = "pclk", "timer";
        };
 
        pwm0: pwm@20050000 {
index 4021e92e0fdca210343231a93507c7e32dae5c6b..dea025a6469f8c3215081aac610a04a02b702a0c 100644 (file)
                compatible = "rockchip,rk3228-timer", "rockchip,rk3288-timer";
                reg = <0x110c0000 0x20>;
                interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
-               clocks = <&xin24m>, <&cru PCLK_TIMER>;
-               clock-names = "timer", "pclk";
+               clocks = <&cru PCLK_TIMER>, <&xin24m>;
+               clock-names = "pclk", "timer";
        };
 
        cru: clock-controller@110e0000 {
index 0380c3fa45774e3d177fe698ef06a2bfb11a3551..668fb15137cce52aab13867545dbcf7cf9dfafbc 100644 (file)
                compatible = "rockchip,rv1108-timer", "rockchip,rk3288-timer";
                reg = <0x10350000 0x20>;
                interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
-               clocks = <&xin24m>, <&cru PCLK_TIMER>;
-               clock-names = "timer", "pclk";
+               clocks = <&cru PCLK_TIMER>, <&xin24m>;
+               clock-names = "pclk", "timer";
        };
 
        watchdog: watchdog@10360000 {