ACPICA: IORT: Update for revision E.e
authorRobin Murphy <robin.murphy@arm.com>
Thu, 27 Oct 2022 17:57:42 +0000 (19:57 +0200)
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>
Fri, 28 Oct 2022 15:28:23 +0000 (17:28 +0200)
ACPICA commit 54b54732c5fc9e0384bcfd531f3c10d3a7b628b5

The latest IORT update makes one small addition to SMMUv3 nodes to
describe MSI support independently of wired GSIV support.

Link: https://github.com/acpica/acpica/commit/54b54732
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
include/acpi/actbl2.h

index a2e386e94095356da78c6305168ff5289cd06787..05116f5c19a8c6c77bc3de0f9e9cef07fbd4c7ba 100644 (file)
@@ -375,7 +375,7 @@ struct acpi_table_ccel {
  * IORT - IO Remapping Table
  *
  * Conforms to "IO Remapping Table System Software on ARM Platforms",
- * Document number: ARM DEN 0049E.d, Feb 2022
+ * Document number: ARM DEN 0049E.e, Sep 2022
  *
  ******************************************************************************/
 
@@ -546,6 +546,7 @@ struct acpi_iort_smmu_v3 {
 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE   (1)
 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE     (3<<1)
 #define ACPI_IORT_SMMU_V3_PXM_VALID         (1<<3)
+#define ACPI_IORT_SMMU_V3_DEVICEID_VALID    (1<<4)
 
 struct acpi_iort_pmcg {
        u64 page0_base_address;