drm/amdgpu/mes11: print MES opcodes rather than numbers
authorAlex Deucher <alexander.deucher@amd.com>
Sat, 30 Mar 2024 13:46:49 +0000 (09:46 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 23 Apr 2024 16:08:30 +0000 (12:08 -0400)
Makes it easier to review the logs when there are MES
errors.

v2: use dbg for emitted, add helpers for fetching strings
v3: fix missing commas (Harish)
v4: drop command prefixes (Felix)
v5: squash in bounds fix (Jun)

Acked-by: Felix Kuehling <felix.kuehling@amd.com>
Reviewed by Shaoyun.liu <Shaoyun.liu@amd.com> (v2)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c

index 81833395324a0c618933e87bdfa8969ef4583778..fbe31afad1d4e7b7c492369ba1c8d1fadc46a6fe 100644 (file)
@@ -100,18 +100,72 @@ static const struct amdgpu_ring_funcs mes_v11_0_ring_funcs = {
        .insert_nop = amdgpu_ring_insert_nop,
 };
 
+static const char *mes_v11_0_opcodes[] = {
+       "SET_HW_RSRC",
+       "SET_SCHEDULING_CONFIG",
+       "ADD_QUEUE",
+       "REMOVE_QUEUE",
+       "PERFORM_YIELD",
+       "SET_GANG_PRIORITY_LEVEL",
+       "SUSPEND",
+       "RESUME",
+       "RESET",
+       "SET_LOG_BUFFER",
+       "CHANGE_GANG_PRORITY",
+       "QUERY_SCHEDULER_STATUS",
+       "PROGRAM_GDS",
+       "SET_DEBUG_VMID",
+       "MISC",
+       "UPDATE_ROOT_PAGE_TABLE",
+       "AMD_LOG",
+};
+
+static const char *mes_v11_0_misc_opcodes[] = {
+       "WRITE_REG",
+       "INV_GART",
+       "QUERY_STATUS",
+       "READ_REG",
+       "WAIT_REG_MEM",
+       "SET_SHADER_DEBUGGER",
+};
+
+static const char *mes_v11_0_get_op_string(union MESAPI__MISC *x_pkt)
+{
+       const char *op_str = NULL;
+
+       if (x_pkt->header.opcode < ARRAY_SIZE(mes_v11_0_opcodes))
+               op_str = mes_v11_0_opcodes[x_pkt->header.opcode];
+
+       return op_str;
+}
+
+static const char *mes_v11_0_get_misc_op_string(union MESAPI__MISC *x_pkt)
+{
+       const char *op_str = NULL;
+
+       if ((x_pkt->header.opcode == MES_SCH_API_MISC) &&
+           (x_pkt->opcode < ARRAY_SIZE(mes_v11_0_misc_opcodes)))
+               op_str = mes_v11_0_misc_opcodes[x_pkt->opcode];
+
+       return op_str;
+}
+
 static int mes_v11_0_submit_pkt_and_poll_completion(struct amdgpu_mes *mes,
                                                    void *pkt, int size,
                                                    int api_status_off)
 {
        int ndw = size / 4;
        signed long r;
-       union MESAPI__ADD_QUEUE *x_pkt = pkt;
+       union MESAPI__MISC *x_pkt = pkt;
        struct MES_API_STATUS *api_status;
        struct amdgpu_device *adev = mes->adev;
        struct amdgpu_ring *ring = &mes->ring;
        unsigned long flags;
        signed long timeout = 3000000; /* 3000 ms */
+       const char *op_str, *misc_op_str;
+
+       if (x_pkt->header.opcode >= MES_SCH_API_MAX)
+               return -EINVAL;
 
        if (amdgpu_emu_mode) {
                timeout *= 100;
@@ -135,13 +189,29 @@ static int mes_v11_0_submit_pkt_and_poll_completion(struct amdgpu_mes *mes,
        amdgpu_ring_commit(ring);
        spin_unlock_irqrestore(&mes->ring_lock, flags);
 
-       DRM_DEBUG("MES msg=%d was emitted\n", x_pkt->header.opcode);
+       op_str = mes_v11_0_get_op_string(x_pkt);
+       misc_op_str = mes_v11_0_get_misc_op_string(x_pkt);
+
+       if (misc_op_str)
+               dev_dbg(adev->dev, "MES msg=%s (%s) was emitted\n", op_str, misc_op_str);
+       else if (op_str)
+               dev_dbg(adev->dev, "MES msg=%s was emitted\n", op_str);
+       else
+               dev_dbg(adev->dev, "MES msg=%d was emitted\n", x_pkt->header.opcode);
 
        r = amdgpu_fence_wait_polling(ring, ring->fence_drv.sync_seq,
                      timeout);
        if (r < 1) {
-               DRM_ERROR("MES failed to response msg=%d\n",
-                         x_pkt->header.opcode);
+
+               if (misc_op_str)
+                       dev_err(adev->dev, "MES failed to respond to msg=%s (%s)\n",
+                               op_str, misc_op_str);
+               else if (op_str)
+                       dev_err(adev->dev, "MES failed to respond to msg=%s\n",
+                               op_str);
+               else
+                       dev_err(adev->dev, "MES failed to respond to msg=%d\n",
+                               x_pkt->header.opcode);
 
                while (halt_if_hws_hang)
                        schedule();