arm64: dts: renesas: r9a07g054: Add SPI{0,2} nodes and fillup SPI1 stub node

Add SPI{0,2} nodes and fillup SPI1 stub node in RZ/V2L (R9A07G054)
SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220227203744.18355-13-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
index 8bbdcf48bb6167fa993af2b3201195c2b8939f1e..9e730171efa8090bc167885371ed3e837076eda2 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
@@ -179,11 +179,52 @@
                        status = "disabled";
                };
 
+               spi0: spi@1004ac00 {
+                       compatible = "renesas,r9a07g054-rspi", "renesas,rspi-rz";
+                       reg = <0 0x1004ac00 0 0x400>;
+                       interrupts = <GIC_SPI 415 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 414 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "error", "rx", "tx";
+                       clocks = <&cpg CPG_MOD R9A07G054_RSPI0_CLKB>;
+                       resets = <&cpg R9A07G054_RSPI0_RST>;
+                       power-domains = <&cpg>;
+                       num-cs = <1>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
                spi1: spi@1004b000 {
+                       compatible = "renesas,r9a07g054-rspi", "renesas,rspi-rz";
                        reg = <0 0x1004b000 0 0x400>;
+                       interrupts = <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "error", "rx", "tx";
+                       clocks = <&cpg CPG_MOD R9A07G054_RSPI1_CLKB>;
+                       resets = <&cpg R9A07G054_RSPI1_RST>;
+                       power-domains = <&cpg>;
+                       num-cs = <1>;
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       /* place holder */
+                       status = "disabled";
+               };
+
+               spi2: spi@1004b400 {
+                       compatible = "renesas,r9a07g054-rspi", "renesas,rspi-rz";
+                       reg = <0 0x1004b400 0 0x400>;
+                       interrupts = <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "error", "rx", "tx";
+                       clocks = <&cpg CPG_MOD R9A07G054_RSPI2_CLKB>;
+                       resets = <&cpg R9A07G054_RSPI2_RST>;
+                       power-domains = <&cpg>;
+                       num-cs = <1>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
                };
 
                scif0: serial@1004b800 {