--- /dev/null
+/*
+ * Broadcom B43 wireless driver
+ * IEEE 802.11ac AC-PHY support
+ *
+ * Copyright (c) 2015 Rafał Miłecki <zajec5@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under  the terms of the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include "b43.h"
+#include "phy_ac.h"
+
+/**************************************************
+ * Basic PHY ops
+ **************************************************/
+
+static int b43_phy_ac_op_allocate(struct b43_wldev *dev)
+{
+       struct b43_phy_ac *phy_ac;
+
+       phy_ac = kzalloc(sizeof(*phy_ac), GFP_KERNEL);
+       if (!phy_ac)
+               return -ENOMEM;
+       dev->phy.ac = phy_ac;
+
+       return 0;
+}
+
+static void b43_phy_ac_op_free(struct b43_wldev *dev)
+{
+       struct b43_phy *phy = &dev->phy;
+       struct b43_phy_ac *phy_ac = phy->ac;
+
+       kfree(phy_ac);
+       phy->ac = NULL;
+}
+
+static void b43_phy_ac_op_maskset(struct b43_wldev *dev, u16 reg, u16 mask,
+                                 u16 set)
+{
+       b43_write16f(dev, B43_MMIO_PHY_CONTROL, reg);
+       b43_write16(dev, B43_MMIO_PHY_DATA,
+                   (b43_read16(dev, B43_MMIO_PHY_DATA) & mask) | set);
+}
+
+static u16 b43_phy_ac_op_radio_read(struct b43_wldev *dev, u16 reg)
+{
+       b43_write16f(dev, B43_MMIO_RADIO24_CONTROL, reg);
+       return b43_read16(dev, B43_MMIO_RADIO24_DATA);
+}
+
+static void b43_phy_ac_op_radio_write(struct b43_wldev *dev, u16 reg,
+                                     u16 value)
+{
+       b43_write16f(dev, B43_MMIO_RADIO24_CONTROL, reg);
+       b43_write16(dev, B43_MMIO_RADIO24_DATA, value);
+}
+
+static unsigned int b43_phy_ac_op_get_default_chan(struct b43_wldev *dev)
+{
+       if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
+               return 11;
+       return 36;
+}
+
+static enum b43_txpwr_result
+b43_phy_ac_op_recalc_txpower(struct b43_wldev *dev, bool ignore_tssi)
+{
+       return B43_TXPWR_RES_DONE;
+}
+
+static void b43_phy_ac_op_adjust_txpower(struct b43_wldev *dev)
+{
+}
+
+/**************************************************
+ * PHY ops struct
+ **************************************************/
+
+const struct b43_phy_operations b43_phyops_ac = {
+       .allocate               = b43_phy_ac_op_allocate,
+       .free                   = b43_phy_ac_op_free,
+       .phy_maskset            = b43_phy_ac_op_maskset,
+       .radio_read             = b43_phy_ac_op_radio_read,
+       .radio_write            = b43_phy_ac_op_radio_write,
+       .get_default_chan       = b43_phy_ac_op_get_default_chan,
+       .recalc_txpower         = b43_phy_ac_op_recalc_txpower,
+       .adjust_txpower         = b43_phy_ac_op_adjust_txpower,
+};
 
--- /dev/null
+#ifndef B43_PHY_AC_H_
+#define B43_PHY_AC_H_
+
+#include "phy_common.h"
+
+#define B43_PHY_AC_BBCFG                       0x001
+#define  B43_PHY_AC_BBCFG_RSTCCA               0x4000  /* Reset CCA */
+#define B43_PHY_AC_BANDCTL                     0x003   /* Band control */
+#define  B43_PHY_AC_BANDCTL_5GHZ               0x0001
+#define B43_PHY_AC_TABLE_ID                    0x00d
+#define B43_PHY_AC_TABLE_OFFSET                        0x00e
+#define B43_PHY_AC_TABLE_DATA1                 0x00f
+#define B43_PHY_AC_TABLE_DATA2                 0x010
+#define B43_PHY_AC_TABLE_DATA3                 0x011
+#define B43_PHY_AC_CLASSCTL                    0x140   /* Classifier control */
+#define  B43_PHY_AC_CLASSCTL_CCKEN             0x0001  /* CCK enable */
+#define  B43_PHY_AC_CLASSCTL_OFDMEN            0x0002  /* OFDM enable */
+#define  B43_PHY_AC_CLASSCTL_WAITEDEN          0x0004  /* Waited enable */
+#define B43_PHY_AC_BW1A                                0x371
+#define B43_PHY_AC_BW2                         0x372
+#define B43_PHY_AC_BW3                         0x373
+#define B43_PHY_AC_BW4                         0x374
+#define B43_PHY_AC_BW5                         0x375
+#define B43_PHY_AC_BW6                         0x376
+#define B43_PHY_AC_RFCTL_CMD                   0x408
+#define B43_PHY_AC_C1_CLIP                     0x6d4
+#define  B43_PHY_AC_C1_CLIP_DIS                        0x4000
+#define B43_PHY_AC_C2_CLIP                     0x8d4
+#define  B43_PHY_AC_C2_CLIP_DIS                        0x4000
+#define B43_PHY_AC_C3_CLIP                     0xad4
+#define  B43_PHY_AC_C3_CLIP_DIS                        0x4000
+
+struct b43_phy_ac {
+};
+
+extern const struct b43_phy_operations b43_phyops_ac;
+
+#endif /* B43_PHY_AC_H_ */