/* opcode 0x15 is reserved */
        IB_OPCODE_SEND_LAST_WITH_INVALIDATE         = 0x16,
        IB_OPCODE_SEND_ONLY_WITH_INVALIDATE         = 0x17,
+       IB_OPCODE_ATOMIC_WRITE                      = 0x1D,
 
        /* real constants follow -- see comment about above IB_OPCODE()
           macro for more details */
        IB_OPCODE(RC, FETCH_ADD),
        IB_OPCODE(RC, SEND_LAST_WITH_INVALIDATE),
        IB_OPCODE(RC, SEND_ONLY_WITH_INVALIDATE),
+       IB_OPCODE(RC, ATOMIC_WRITE),
 
        /* UC */
        IB_OPCODE(UC, SEND_FIRST),
 
        /* The device supports padding incoming writes to cacheline. */
        IB_DEVICE_PCI_WRITE_END_PADDING =
                IB_UVERBS_DEVICE_PCI_WRITE_END_PADDING,
+       IB_DEVICE_ATOMIC_WRITE = IB_UVERBS_DEVICE_ATOMIC_WRITE,
 };
 
 enum ib_kernel_cap_flags {
        IB_WC_BIND_MW = IB_UVERBS_WC_BIND_MW,
        IB_WC_LOCAL_INV = IB_UVERBS_WC_LOCAL_INV,
        IB_WC_LSO = IB_UVERBS_WC_TSO,
+       IB_WC_ATOMIC_WRITE = IB_UVERBS_WC_ATOMIC_WRITE,
        IB_WC_REG_MR,
        IB_WC_MASKED_COMP_SWAP,
        IB_WC_MASKED_FETCH_ADD,
                IB_UVERBS_WR_MASKED_ATOMIC_CMP_AND_SWP,
        IB_WR_MASKED_ATOMIC_FETCH_AND_ADD =
                IB_UVERBS_WR_MASKED_ATOMIC_FETCH_AND_ADD,
+       IB_WR_ATOMIC_WRITE = IB_UVERBS_WR_ATOMIC_WRITE,
 
        /* These are kernel only and can not be issued by userspace */
        IB_WR_REG_MR = 0x20,