Add reset and IOMMU header for Tegra234 GPCDMA
Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
 /* NISO0 stream IDs */
 #define TEGRA234_SID_APE       0x02
 #define TEGRA234_SID_HDA       0x03
+#define TEGRA234_SID_GPCDMA    0x04
 #define TEGRA234_SID_PCIE0     0x12
 #define TEGRA234_SID_PCIE4     0x13
 #define TEGRA234_SID_PCIE5     0x14
 
 #define TEGRA234_RESET_PEX1_COMMON_APB         13U
 #define TEGRA234_RESET_PEX2_CORE_7             14U
 #define TEGRA234_RESET_PEX2_CORE_7_APB         15U
+#define TEGRA234_RESET_GPCDMA                  18U
 #define TEGRA234_RESET_HDA                     20U
 #define TEGRA234_RESET_HDACODEC                        21U
 #define TEGRA234_RESET_I2C1                    24U