arm64: dts: renesas: r8a779f0: Add SCIF nodes

Extracted from a bigger patch in the BSP, rebased, reg length corrected,
and DMA properties added.

Signed-off-by: Linh Phung <linh.phung.jy@renesas.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220614095242.8264-1-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi
index 3852bd150ff2e1cfbfe736fc38e3eed135f94983..384817ffa4deb73c8f88e95ca474d7462845a7bc 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi
@@ -516,6 +516,40 @@
                        status = "disabled";
                };
 
+               scif0: serial@e6e60000 {
+                       compatible = "renesas,scif-r8a779f0",
+                                    "renesas,rcar-gen4-scif", "renesas,scif";
+                       reg = <0 0xe6e60000 0 64>;
+                       interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 702>,
+                                <&cpg CPG_CORE R8A779F0_CLK_S0D3_PER>,
+                                <&scif_clk>;
+                       clock-names = "fck", "brg_int", "scif_clk";
+                       dmas = <&dmac0 0x51>, <&dmac0 0x50>,
+                              <&dmac1 0x51>, <&dmac1 0x50>;
+                       dma-names = "tx", "rx", "tx", "rx";
+                       power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
+                       resets = <&cpg 702>;
+                       status = "disabled";
+               };
+
+               scif1: serial@e6e68000 {
+                       compatible = "renesas,scif-r8a779f0",
+                                    "renesas,rcar-gen4-scif", "renesas,scif";
+                       reg = <0 0xe6e68000 0 64>;
+                       interrupts = <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 703>,
+                                <&cpg CPG_CORE R8A779F0_CLK_S0D3_PER>,
+                                <&scif_clk>;
+                       clock-names = "fck", "brg_int", "scif_clk";
+                       dmas = <&dmac0 0x53>, <&dmac0 0x52>,
+                              <&dmac1 0x53>, <&dmac1 0x52>;
+                       dma-names = "tx", "rx", "tx", "rx";
+                       power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
+                       resets = <&cpg 703>;
+                       status = "disabled";
+               };
+
                scif3: serial@e6c50000 {
                        compatible = "renesas,scif-r8a779f0",
                                     "renesas,rcar-gen4-scif", "renesas,scif";
@@ -533,6 +567,23 @@
                        status = "disabled";
                };
 
+               scif4: serial@e6c40000 {
+                       compatible = "renesas,scif-r8a779f0",
+                                    "renesas,rcar-gen4-scif", "renesas,scif";
+                       reg = <0 0xe6c40000 0 64>;
+                       interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 705>,
+                                <&cpg CPG_CORE R8A779F0_CLK_S0D3_PER>,
+                                <&scif_clk>;
+                       clock-names = "fck", "brg_int", "scif_clk";
+                       dmas = <&dmac0 0x59>, <&dmac0 0x58>,
+                              <&dmac1 0x59>, <&dmac1 0x58>;
+                       dma-names = "tx", "rx", "tx", "rx";
+                       power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>;
+                       resets = <&cpg 705>;
+                       status = "disabled";
+               };
+
                dmac0: dma-controller@e7350000 {
                        compatible = "renesas,dmac-r8a779f0",
                                     "renesas,rcar-gen4-dmac";