ARM: dts: qcom: add L2CC and RPM for IPQ8064

This adds the L2CC IPC resource and RPM devices to the IPQ8064 device
tree.

Tested on a Mikrotik RB3011.

Signed-off-by: Jonathan McDowell <noodles@earth.li>
Link: https://lore.kernel.org/r/a99eb2a27214b8f41070d7f1faec591e35666b21.1621531633.git.noodles@earth.li
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
index 239266b55c37dcab81189042323f47b4dc2cfd8a..7bcf5ef9215751bc6ed7e0ed695aa806a88a686e 100644 (file)
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -2,6 +2,8 @@
 /dts-v1/;
 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/mfd/qcom-rpm.h>
+#include <dt-bindings/clock/qcom,rpmcc.h>
 #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
 #include <dt-bindings/clock/qcom,lcc-ipq806x.h>
 #include <dt-bindings/gpio/gpio.h>
@@ -753,11 +755,38 @@
                        };
                };
 
+               rpm: rpm@108000 {
+                       compatible = "qcom,rpm-ipq8064";
+                       reg = <0x108000 0x1000>;
+                       qcom,ipc = <&l2cc 0x8 2>;
+
+                       interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
+                                       <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
+                                       <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "ack", "err", "wakeup";
+
+                       clocks = <&gcc RPM_MSG_RAM_H_CLK>;
+                       clock-names = "ram";
+
+                       rpmcc: clock-controller {
+                               compatible = "qcom,rpmcc-ipq806x", "qcom,rpmcc";
+                               #clock-cells = <1>;
+                       };
+               };
+
                tcsr: syscon@1a400000 {
                        compatible = "qcom,tcsr-ipq8064", "syscon";
                        reg = <0x1a400000 0x100>;
                };
 
+               l2cc: clock-controller@2011000 {
+                       compatible = "qcom,kpss-gcc", "syscon";
+                       reg = <0x2011000 0x1000>;
+                       clocks = <&gcc PLL8_VOTE>, <&gcc PXO_SRC>;
+                       clock-names = "pll8_vote", "pxo";
+                       clock-output-names = "acpu_l2_aux";
+               };
+
                lcc: clock-controller@28000000 {
                        compatible = "qcom,lcc-ipq8064";
                        reg = <0x28000000 0x1000>;