cxl/pci: Store component register base in cxlds
authorBen Widawsky <ben.widawsky@intel.com>
Tue, 1 Feb 2022 21:28:53 +0000 (13:28 -0800)
committerDan Williams <dan.j.williams@intel.com>
Wed, 9 Feb 2022 06:57:30 +0000 (22:57 -0800)
In preparation for defining a cxl_port object to represent the decoder
resources of a memory expander capture the component register base
address.

The port driver uses the component register base to enumerate the HDM
Decoder Capability structure. Unlike other cxl_port objects the endpoint
port decodes from upstream SPA to downstream DPA rather than upstream
port to downstream port.

Signed-off-by: Ben Widawsky <ben.widawsky@intel.com>
Reported-by: kernel test robot <lkp@intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
[djbw: clarify changelog]
Link: https://lore.kernel.org/r/164375084181.484304.3919737667590006795.stgit@dwillia2-desk3.amr.corp.intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
drivers/cxl/cxlmem.h
drivers/cxl/pci.c

index fca2d1b5f6ff3d1f7ae81a96b9aa4d4b5d95917f..90d67fff5bed96c61ca2930162f9ff2013be2e78 100644 (file)
@@ -116,6 +116,7 @@ struct cxl_mbox_cmd {
  * @active_persistent_bytes: sum of hard + soft persistent
  * @next_volatile_bytes: volatile capacity change pending device reset
  * @next_persistent_bytes: persistent capacity change pending device reset
+ * @component_reg_phys: register base of component registers
  * @mbox_send: @dev specific transport for transmitting mailbox commands
  *
  * See section 8.2.9.5.2 Capacity Configuration and Label Storage for
@@ -145,6 +146,8 @@ struct cxl_dev_state {
        u64 next_volatile_bytes;
        u64 next_persistent_bytes;
 
+       resource_size_t component_reg_phys;
+
        int (*mbox_send)(struct cxl_dev_state *cxlds, struct cxl_mbox_cmd *cmd);
 };
 
index 8b435b875b65a8d3a20935d9706dda34a6a20b49..bf14c365ea335ada7c5b725d39abc1a5dfdba68c 100644 (file)
@@ -416,6 +416,17 @@ static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
        if (rc)
                return rc;
 
+       /*
+        * If the component registers can't be found, the cxl_pci driver may
+        * still be useful for management functions so don't return an error.
+        */
+       cxlds->component_reg_phys = CXL_RESOURCE_NONE;
+       rc = cxl_setup_regs(pdev, CXL_REGLOC_RBI_COMPONENT, &map);
+       if (rc)
+               dev_warn(&pdev->dev, "No component registers (%d)\n", rc);
+
+       cxlds->component_reg_phys = cxl_regmap_to_base(pdev, &map);
+
        rc = cxl_pci_setup_mailbox(cxlds);
        if (rc)
                return rc;