iommu/arm-smmu-qcom: Merge table from arm-smmu-qcom-debug into match data

There is little point in having a separate match table in
arm-smmu-qcom-debug.c. Merge it into the main match data table in
arm-smmu-qcom.c

Note, this also enables debug support for qdu1000, sm6115, sm6375 and
ACPI-based sc8180x systems, since these SoCs are expected to support
tlb_sync debug.

Reviewed-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com>
Tested-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20221114170635.1406534-9-dmitry.baryshkov@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>

diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom-debug.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom-debug.c
index 6eed8e67a0ca834d4a7c6ac3f2c1598f24a2a296..74e9ef2fd5804fcf933e918983ad4ca7d1698aac 100644 (file)
--- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom-debug.c
+++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom-debug.c
@@ -10,16 +10,6 @@
 #include "arm-smmu.h"
 #include "arm-smmu-qcom.h"
 
-enum qcom_smmu_impl_reg_offset {
-       QCOM_SMMU_TBU_PWR_STATUS,
-       QCOM_SMMU_STATS_SYNC_INV_TBU_ACK,
-       QCOM_SMMU_MMU2QSS_AND_SAFE_WAIT_CNTR,
-};
-
-struct qcom_smmu_config {
-       const u32 *reg_offset;
-};
-
 void qcom_smmu_tlb_sync_debug(struct arm_smmu_device *smmu)
 {
        int ret;
@@ -59,84 +49,3 @@ void qcom_smmu_tlb_sync_debug(struct arm_smmu_device *smmu)
                        tbu_pwr_status, sync_inv_ack, sync_inv_progress);
        }
 }
-
-/* Implementation Defined Register Space 0 register offsets */
-static const u32 qcom_smmu_impl0_reg_offset[] = {
-       [QCOM_SMMU_TBU_PWR_STATUS]              = 0x2204,
-       [QCOM_SMMU_STATS_SYNC_INV_TBU_ACK]      = 0x25dc,
-       [QCOM_SMMU_MMU2QSS_AND_SAFE_WAIT_CNTR]  = 0x2670,
-};
-
-static const struct qcom_smmu_config qcm2290_smmu_cfg = {
-       .reg_offset = qcom_smmu_impl0_reg_offset,
-};
-
-static const struct qcom_smmu_config sc7180_smmu_cfg = {
-       .reg_offset = qcom_smmu_impl0_reg_offset,
-};
-
-static const struct qcom_smmu_config sc7280_smmu_cfg = {
-       .reg_offset = qcom_smmu_impl0_reg_offset,
-};
-
-static const struct qcom_smmu_config sc8180x_smmu_cfg = {
-       .reg_offset = qcom_smmu_impl0_reg_offset,
-};
-
-static const struct qcom_smmu_config sc8280xp_smmu_cfg = {
-       .reg_offset = qcom_smmu_impl0_reg_offset,
-};
-
-static const struct qcom_smmu_config sm6125_smmu_cfg = {
-       .reg_offset = qcom_smmu_impl0_reg_offset,
-};
-
-static const struct qcom_smmu_config sm6350_smmu_cfg = {
-       .reg_offset = qcom_smmu_impl0_reg_offset,
-};
-
-static const struct qcom_smmu_config sm8150_smmu_cfg = {
-       .reg_offset = qcom_smmu_impl0_reg_offset,
-};
-
-static const struct qcom_smmu_config sm8250_smmu_cfg = {
-       .reg_offset = qcom_smmu_impl0_reg_offset,
-};
-
-static const struct qcom_smmu_config sm8350_smmu_cfg = {
-       .reg_offset = qcom_smmu_impl0_reg_offset,
-};
-
-static const struct qcom_smmu_config sm8450_smmu_cfg = {
-       .reg_offset = qcom_smmu_impl0_reg_offset,
-};
-
-static const struct of_device_id __maybe_unused qcom_smmu_impl_debug_match[] = {
-       { .compatible = "qcom,msm8998-smmu-v2" },
-       { .compatible = "qcom,qcm2290-smmu-500", .data = &qcm2290_smmu_cfg },
-       { .compatible = "qcom,sc7180-smmu-500", .data = &sc7180_smmu_cfg },
-       { .compatible = "qcom,sc7280-smmu-500", .data = &sc7280_smmu_cfg},
-       { .compatible = "qcom,sc8180x-smmu-500", .data = &sc8180x_smmu_cfg },
-       { .compatible = "qcom,sc8280xp-smmu-500", .data = &sc8280xp_smmu_cfg },
-       { .compatible = "qcom,sdm630-smmu-v2" },
-       { .compatible = "qcom,sdm845-smmu-500" },
-       { .compatible = "qcom,sm6125-smmu-500", .data = &sm6125_smmu_cfg},
-       { .compatible = "qcom,sm6350-smmu-500", .data = &sm6350_smmu_cfg},
-       { .compatible = "qcom,sm8150-smmu-500", .data = &sm8150_smmu_cfg },
-       { .compatible = "qcom,sm8250-smmu-500", .data = &sm8250_smmu_cfg },
-       { .compatible = "qcom,sm8350-smmu-500", .data = &sm8350_smmu_cfg },
-       { .compatible = "qcom,sm8450-smmu-500", .data = &sm8450_smmu_cfg },
-       { }
-};
-
-const void *qcom_smmu_impl_data(struct arm_smmu_device *smmu)
-{
-       const struct of_device_id *match;
-       const struct device_node *np = smmu->dev->of_node;
-
-       match = of_match_node(qcom_smmu_impl_debug_match, np);
-       if (!match)
-               return NULL;
-
-       return match->data;
-}

diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
index 6dc7fa9187991790ae73ec49d17df4aa52478b85..1843bcd81402e742d4eef093c567a618f1bee8ed 100644 (file)
--- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
+++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
@@ -430,11 +430,22 @@ static struct arm_smmu_device *qcom_smmu_create(struct arm_smmu_device *smmu,
                return ERR_PTR(-ENOMEM);
 
        qsmmu->smmu.impl = impl;
-       qsmmu->cfg = qcom_smmu_impl_data(smmu);
+       qsmmu->cfg = data->cfg;
 
        return &qsmmu->smmu;
 }
 
+/* Implementation Defined Register Space 0 register offsets */
+static const u32 qcom_smmu_impl0_reg_offset[] = {
+       [QCOM_SMMU_TBU_PWR_STATUS]              = 0x2204,
+       [QCOM_SMMU_STATS_SYNC_INV_TBU_ACK]      = 0x25dc,
+       [QCOM_SMMU_MMU2QSS_AND_SAFE_WAIT_CNTR]  = 0x2670,
+};
+
+static const struct qcom_smmu_config qcom_smmu_impl0_cfg = {
+       .reg_offset = qcom_smmu_impl0_reg_offset,
+};
+
 /*
  * It is not yet possible to use MDP SMMU with the bypass quirk on the msm8996,
  * there are not enough context banks.
@@ -455,28 +466,35 @@ static const struct qcom_smmu_match_data sdm845_smmu_500_data = {
         * No need for adreno impl here. On sdm845 the Adreno SMMU is handled
         * by the separate sdm845-smmu-v2 device.
         */
+       /* Also no debug configuration. */
+};
+
+static const struct qcom_smmu_match_data qcom_smmu_500_impl0_data = {
+       .impl = &qcom_smmu_impl,
+       .adreno_impl = &qcom_adreno_smmu_impl,
+       .cfg = &qcom_smmu_impl0_cfg,
 };
 
 static const struct of_device_id __maybe_unused qcom_smmu_impl_of_match[] = {
        { .compatible = "qcom,msm8996-smmu-v2", .data = &msm8996_smmu_data },
        { .compatible = "qcom,msm8998-smmu-v2", .data = &qcom_smmu_data },
-       { .compatible = "qcom,qcm2290-smmu-500", .data = &qcom_smmu_data },
-       { .compatible = "qcom,qdu1000-smmu-500", .data = &qcom_smmu_data  },
-       { .compatible = "qcom,sc7180-smmu-500", .data = &qcom_smmu_data },
-       { .compatible = "qcom,sc7280-smmu-500", .data = &qcom_smmu_data },
-       { .compatible = "qcom,sc8180x-smmu-500", .data = &qcom_smmu_data },
-       { .compatible = "qcom,sc8280xp-smmu-500", .data = &qcom_smmu_data },
+       { .compatible = "qcom,qcm2290-smmu-500", .data = &qcom_smmu_500_impl0_data },
+       { .compatible = "qcom,qdu1000-smmu-500", .data = &qcom_smmu_500_impl0_data  },
+       { .compatible = "qcom,sc7180-smmu-500", .data = &qcom_smmu_500_impl0_data },
+       { .compatible = "qcom,sc7280-smmu-500", .data = &qcom_smmu_500_impl0_data },
+       { .compatible = "qcom,sc8180x-smmu-500", .data = &qcom_smmu_500_impl0_data },
+       { .compatible = "qcom,sc8280xp-smmu-500", .data = &qcom_smmu_500_impl0_data },
        { .compatible = "qcom,sdm630-smmu-v2", .data = &qcom_smmu_data },
        { .compatible = "qcom,sdm845-smmu-v2", .data = &qcom_smmu_data },
        { .compatible = "qcom,sdm845-smmu-500", .data = &sdm845_smmu_500_data },
-       { .compatible = "qcom,sm6115-smmu-500", .data = &qcom_smmu_data },
-       { .compatible = "qcom,sm6125-smmu-500", .data = &qcom_smmu_data },
-       { .compatible = "qcom,sm6350-smmu-500", .data = &qcom_smmu_data },
-       { .compatible = "qcom,sm6375-smmu-500", .data = &qcom_smmu_data },
-       { .compatible = "qcom,sm8150-smmu-500", .data = &qcom_smmu_data },
-       { .compatible = "qcom,sm8250-smmu-500", .data = &qcom_smmu_data },
-       { .compatible = "qcom,sm8350-smmu-500", .data = &qcom_smmu_data },
-       { .compatible = "qcom,sm8450-smmu-500", .data = &qcom_smmu_data },
+       { .compatible = "qcom,sm6115-smmu-500", .data = &qcom_smmu_500_impl0_data},
+       { .compatible = "qcom,sm6125-smmu-500", .data = &qcom_smmu_500_impl0_data },
+       { .compatible = "qcom,sm6350-smmu-500", .data = &qcom_smmu_500_impl0_data },
+       { .compatible = "qcom,sm6375-smmu-500", .data = &qcom_smmu_500_impl0_data },
+       { .compatible = "qcom,sm8150-smmu-500", .data = &qcom_smmu_500_impl0_data },
+       { .compatible = "qcom,sm8250-smmu-500", .data = &qcom_smmu_500_impl0_data },
+       { .compatible = "qcom,sm8350-smmu-500", .data = &qcom_smmu_500_impl0_data },
+       { .compatible = "qcom,sm8450-smmu-500", .data = &qcom_smmu_500_impl0_data },
        { }
 };
 
@@ -497,7 +515,7 @@ struct arm_smmu_device *qcom_smmu_impl_init(struct arm_smmu_device *smmu)
        if (np == NULL) {
                /* Match platform for ACPI boot */
                if (acpi_match_platform_list(qcom_acpi_platlist) >= 0)
-                       return qcom_smmu_create(smmu, &qcom_smmu_data);
+                       return qcom_smmu_create(smmu, &qcom_smmu_500_impl0_data);
        }
 #endif
 

diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.h b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.h
index 424d8d342ce063b13f72cac52ce8d25e9ef94766..593910567b8842c5522351aa1fcf74df46be87a6 100644 (file)
--- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.h
+++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.h
@@ -14,20 +14,26 @@ struct qcom_smmu {
        u32 stall_enabled;
 };
 
+enum qcom_smmu_impl_reg_offset {
+       QCOM_SMMU_TBU_PWR_STATUS,
+       QCOM_SMMU_STATS_SYNC_INV_TBU_ACK,
+       QCOM_SMMU_MMU2QSS_AND_SAFE_WAIT_CNTR,
+};
+
+struct qcom_smmu_config {
+       const u32 *reg_offset;
+};
+
 struct qcom_smmu_match_data {
+       const struct qcom_smmu_config *cfg;
        const struct arm_smmu_impl *impl;
        const struct arm_smmu_impl *adreno_impl;
 };
 
 #ifdef CONFIG_ARM_SMMU_QCOM_DEBUG
 void qcom_smmu_tlb_sync_debug(struct arm_smmu_device *smmu);
-const void *qcom_smmu_impl_data(struct arm_smmu_device *smmu);
 #else
 static inline void qcom_smmu_tlb_sync_debug(struct arm_smmu_device *smmu) { }
-static inline const void *qcom_smmu_impl_data(struct arm_smmu_device *smmu)
-{
-       return NULL;
-}
 #endif
 
 #endif /* _ARM_SMMU_QCOM_H */