arm64/sysreg: Add definition for HAFGRTR_EL2

Add a definition of HAFGRTR_EL2 (fine grained trap control for the AMU) as
per DDI0601 2023-09.

This was extracted from Fuad Tabba's patch "KVM: arm64: Handle
HAFGRTR_EL2 trapping in nested virt".

Signed-off-by: Fuad Tabba <tabba@google.com>
Link: https://lore.kernel.org/r/20231206100503.564090-6-tabba@google.com
[Extract sysreg update and rewrite commit message -- broonie]
Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20231209-b4-arm64-sysreg-additions-v1-2-45284e538474@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>

diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index 8faeab1ee024998ffbeaf25f45118d61d42f6bea..145b33f75a96892fae668b93ba5f7b7631a6371e 100644 (file)
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -2297,6 +2297,49 @@ Field    1       DBGBVRn_EL1
 Field  0       DBGBCRn_EL1
 EndSysreg
 
+Sysreg HAFGRTR_EL2     3       4       3       1       6
+Res0   63:50
+Field  49      AMEVTYPER115_EL0
+Field  48      AMEVCNTR115_EL0
+Field  47      AMEVTYPER114_EL0
+Field  46      AMEVCNTR114_EL0
+Field  45      AMEVTYPER113_EL0
+Field  44      AMEVCNTR113_EL0
+Field  43      AMEVTYPER112_EL0
+Field  42      AMEVCNTR112_EL0
+Field  41      AMEVTYPER111_EL0
+Field  40      AMEVCNTR111_EL0
+Field  39      AMEVTYPER110_EL0
+Field  38      AMEVCNTR110_EL0
+Field  37      AMEVTYPER19_EL0
+Field  36      AMEVCNTR19_EL0
+Field  35      AMEVTYPER18_EL0
+Field  34      AMEVCNTR18_EL0
+Field  33      AMEVTYPER17_EL0
+Field  32      AMEVCNTR17_EL0
+Field  31      AMEVTYPER16_EL0
+Field  30      AMEVCNTR16_EL0
+Field  29      AMEVTYPER15_EL0
+Field  28      AMEVCNTR15_EL0
+Field  27      AMEVTYPER14_EL0
+Field  26      AMEVCNTR14_EL0
+Field  25      AMEVTYPER13_EL0
+Field  24      AMEVCNTR13_EL0
+Field  23      AMEVTYPER12_EL0
+Field  22      AMEVCNTR12_EL0
+Field  21      AMEVTYPER11_EL0
+Field  20      AMEVCNTR11_EL0
+Field  19      AMEVTYPER10_EL0
+Field  18      AMEVCNTR10_EL0
+Field  17      AMCNTEN1
+Res0   16:5
+Field  4       AMEVCNTR03_EL0
+Field  3       AMEVCNTR02_EL0
+Field  2       AMEVCNTR01_EL0
+Field  1       AMEVCNTR00_EL0
+Field  0       AMCNTEN0
+EndSysreg
+
 Sysreg ZCR_EL2 3       4       1       2       0
 Fields ZCR_ELx
 EndSysreg