arm64: insn: Add SVE instruction class
authorJulien Thierry <jthierry@redhat.com>
Wed, 3 Mar 2021 17:05:33 +0000 (18:05 +0100)
committerWill Deacon <will@kernel.org>
Thu, 27 May 2021 16:38:30 +0000 (17:38 +0100)
SVE has been public for some time now. Let the decoder acknowledge
its existence.

Signed-off-by: Julien Thierry <jthierry@redhat.com>
Link: https://lore.kernel.org/r/20210303170536.1838032-6-jthierry@redhat.com
Signed-off-by: Will Deacon <will@kernel.org>
arch/arm64/include/asm/insn.h
arch/arm64/lib/insn.c

index 7adc4398fadbf85e0a7cb3ec192659f835960446..93f7b0c86dfd25bee1651debb0729f895bc94d36 100644 (file)
@@ -31,6 +31,7 @@
  */
 enum aarch64_insn_encoding_class {
        AARCH64_INSN_CLS_UNKNOWN,       /* UNALLOCATED */
+       AARCH64_INSN_CLS_SVE,           /* SVE instructions */
        AARCH64_INSN_CLS_DP_IMM,        /* Data processing - immediate */
        AARCH64_INSN_CLS_DP_REG,        /* Data processing - register */
        AARCH64_INSN_CLS_DP_FPSIMD,     /* Data processing - SIMD and FP */
index 6ff8826ae7ea0dbc08bde809f882b206f54e1cc5..b506a4b1e38cf260258eef26dc0741419808c6f0 100644 (file)
@@ -23,7 +23,7 @@
 static const int aarch64_insn_encoding_class[] = {
        AARCH64_INSN_CLS_UNKNOWN,
        AARCH64_INSN_CLS_UNKNOWN,
-       AARCH64_INSN_CLS_UNKNOWN,
+       AARCH64_INSN_CLS_SVE,
        AARCH64_INSN_CLS_UNKNOWN,
        AARCH64_INSN_CLS_LDST,
        AARCH64_INSN_CLS_DP_REG,