clk: qcom: dispcc-sm8250: Make clk_init_data and pll_vco const

The clk_init_data and pll_vco structures are never modified, make
them const.

Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>
Link: https://lore.kernel.org/r/20240201-dispcc-sm8150-v1-1-cbeb89015e5d@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/drivers/clk/qcom/dispcc-sm8250.c b/drivers/clk/qcom/dispcc-sm8250.c
index 9567219ac9b292544e975512c8c9b2365daefaf4..c139c1e481ef7738d5e66caddebb96e98d6dea84 100644 (file)
--- a/drivers/clk/qcom/dispcc-sm8250.c
+++ b/drivers/clk/qcom/dispcc-sm8250.c
@@ -39,11 +39,11 @@ enum {
        P_DSI1_PHY_PLL_OUT_DSICLK,
 };
 
-static struct pll_vco vco_table[] = {
+static const struct pll_vco vco_table[] = {
        { 249600000, 2000000000, 0 },
 };
 
-static struct pll_vco lucid_5lpe_vco[] = {
+static const struct pll_vco lucid_5lpe_vco[] = {
        { 249600000, 1750000000, 0 },
 };
 
@@ -214,7 +214,7 @@ static struct clk_rcg2 disp_cc_mdss_ahb_clk_src = {
        .hid_width = 5,
        .parent_map = disp_cc_parent_map_3,
        .freq_tbl = ftbl_disp_cc_mdss_ahb_clk_src,
-       .clkr.hw.init = &(struct clk_init_data){
+       .clkr.hw.init = &(const struct clk_init_data) {
                .name = "disp_cc_mdss_ahb_clk_src",
                .parent_data = disp_cc_parent_data_3,
                .num_parents = ARRAY_SIZE(disp_cc_parent_data_3),
@@ -233,7 +233,7 @@ static struct clk_rcg2 disp_cc_mdss_byte0_clk_src = {
        .mnd_width = 0,
        .hid_width = 5,
        .parent_map = disp_cc_parent_map_2,
-       .clkr.hw.init = &(struct clk_init_data){
+       .clkr.hw.init = &(const struct clk_init_data) {
                .name = "disp_cc_mdss_byte0_clk_src",
                .parent_data = disp_cc_parent_data_2,
                .num_parents = ARRAY_SIZE(disp_cc_parent_data_2),
@@ -247,7 +247,7 @@ static struct clk_rcg2 disp_cc_mdss_byte1_clk_src = {
        .mnd_width = 0,
        .hid_width = 5,
        .parent_map = disp_cc_parent_map_2,
-       .clkr.hw.init = &(struct clk_init_data){
+       .clkr.hw.init = &(const struct clk_init_data) {
                .name = "disp_cc_mdss_byte1_clk_src",
                .parent_data = disp_cc_parent_data_2,
                .num_parents = ARRAY_SIZE(disp_cc_parent_data_2),
@@ -262,7 +262,7 @@ static struct clk_rcg2 disp_cc_mdss_dp_aux1_clk_src = {
        .hid_width = 5,
        .parent_map = disp_cc_parent_map_1,
        .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src,
-       .clkr.hw.init = &(struct clk_init_data){
+       .clkr.hw.init = &(const struct clk_init_data) {
                .name = "disp_cc_mdss_dp_aux1_clk_src",
                .parent_data = disp_cc_parent_data_1,
                .num_parents = ARRAY_SIZE(disp_cc_parent_data_1),
@@ -277,7 +277,7 @@ static struct clk_rcg2 disp_cc_mdss_dp_aux_clk_src = {
        .hid_width = 5,
        .parent_map = disp_cc_parent_map_1,
        .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src,
-       .clkr.hw.init = &(struct clk_init_data){
+       .clkr.hw.init = &(const struct clk_init_data) {
                .name = "disp_cc_mdss_dp_aux_clk_src",
                .parent_data = disp_cc_parent_data_1,
                .num_parents = ARRAY_SIZE(disp_cc_parent_data_1),
@@ -291,7 +291,7 @@ static struct clk_rcg2 disp_cc_mdss_dp_link1_clk_src = {
        .mnd_width = 0,
        .hid_width = 5,
        .parent_map = disp_cc_parent_map_0,
-       .clkr.hw.init = &(struct clk_init_data){
+       .clkr.hw.init = &(const struct clk_init_data) {
                .name = "disp_cc_mdss_dp_link1_clk_src",
                .parent_data = disp_cc_parent_data_0,
                .num_parents = ARRAY_SIZE(disp_cc_parent_data_0),
@@ -304,7 +304,7 @@ static struct clk_rcg2 disp_cc_mdss_dp_link_clk_src = {
        .mnd_width = 0,
        .hid_width = 5,
        .parent_map = disp_cc_parent_map_0,
-       .clkr.hw.init = &(struct clk_init_data){
+       .clkr.hw.init = &(const struct clk_init_data) {
                .name = "disp_cc_mdss_dp_link_clk_src",
                .parent_data = disp_cc_parent_data_0,
                .num_parents = ARRAY_SIZE(disp_cc_parent_data_0),
@@ -317,7 +317,7 @@ static struct clk_rcg2 disp_cc_mdss_dp_pixel1_clk_src = {
        .mnd_width = 16,
        .hid_width = 5,
        .parent_map = disp_cc_parent_map_0,
-       .clkr.hw.init = &(struct clk_init_data){
+       .clkr.hw.init = &(const struct clk_init_data) {
                .name = "disp_cc_mdss_dp_pixel1_clk_src",
                .parent_data = disp_cc_parent_data_0,
                .num_parents = ARRAY_SIZE(disp_cc_parent_data_0),
@@ -330,7 +330,7 @@ static struct clk_rcg2 disp_cc_mdss_dp_pixel2_clk_src = {
        .mnd_width = 16,
        .hid_width = 5,
        .parent_map = disp_cc_parent_map_0,
-       .clkr.hw.init = &(struct clk_init_data){
+       .clkr.hw.init = &(const struct clk_init_data) {
                .name = "disp_cc_mdss_dp_pixel2_clk_src",
                .parent_data = disp_cc_parent_data_0,
                .num_parents = ARRAY_SIZE(disp_cc_parent_data_0),
@@ -343,7 +343,7 @@ static struct clk_rcg2 disp_cc_mdss_dp_pixel_clk_src = {
        .mnd_width = 16,
        .hid_width = 5,
        .parent_map = disp_cc_parent_map_0,
-       .clkr.hw.init = &(struct clk_init_data){
+       .clkr.hw.init = &(const struct clk_init_data) {
                .name = "disp_cc_mdss_dp_pixel_clk_src",
                .parent_data = disp_cc_parent_data_0,
                .num_parents = ARRAY_SIZE(disp_cc_parent_data_0),
@@ -357,7 +357,7 @@ static struct clk_rcg2 disp_cc_mdss_edp_aux_clk_src = {
        .hid_width = 5,
        .parent_map = disp_cc_parent_map_1,
        .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src,
-       .clkr.hw.init = &(struct clk_init_data){
+       .clkr.hw.init = &(const struct clk_init_data) {
                .name = "disp_cc_mdss_edp_aux_clk_src",
                .parent_data = disp_cc_parent_data_1,
                .num_parents = ARRAY_SIZE(disp_cc_parent_data_1),
@@ -372,7 +372,7 @@ static struct clk_rcg2 disp_cc_mdss_edp_gtc_clk_src = {
        .hid_width = 5,
        .parent_map = disp_cc_parent_map_7,
        .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src,
-       .clkr.hw.init = &(struct clk_init_data){
+       .clkr.hw.init = &(const struct clk_init_data) {
                .name = "disp_cc_mdss_edp_gtc_clk_src",
                .parent_data = disp_cc_parent_data_7,
                .num_parents = ARRAY_SIZE(disp_cc_parent_data_7),
@@ -386,7 +386,7 @@ static struct clk_rcg2 disp_cc_mdss_edp_link_clk_src = {
        .mnd_width = 0,
        .hid_width = 5,
        .parent_map = disp_cc_parent_map_4,
-       .clkr.hw.init = &(struct clk_init_data){
+       .clkr.hw.init = &(const struct clk_init_data) {
                .name = "disp_cc_mdss_edp_link_clk_src",
                .parent_data = disp_cc_parent_data_4,
                .num_parents = ARRAY_SIZE(disp_cc_parent_data_4),
@@ -400,7 +400,7 @@ static struct clk_rcg2 disp_cc_mdss_edp_pixel_clk_src = {
        .mnd_width = 16,
        .hid_width = 5,
        .parent_map = disp_cc_parent_map_4,
-       .clkr.hw.init = &(struct clk_init_data){
+       .clkr.hw.init = &(const struct clk_init_data) {
                .name = "disp_cc_mdss_edp_pixel_clk_src",
                .parent_data = disp_cc_parent_data_4,
                .num_parents = ARRAY_SIZE(disp_cc_parent_data_4),
@@ -414,7 +414,7 @@ static struct clk_branch disp_cc_mdss_edp_aux_clk = {
        .clkr = {
                .enable_reg = 0x2078,
                .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
+               .hw.init = &(const struct clk_init_data) {
                        .name = "disp_cc_mdss_edp_aux_clk",
                        .parent_hws = (const struct clk_hw*[]){
                                &disp_cc_mdss_edp_aux_clk_src.clkr.hw,
@@ -432,7 +432,7 @@ static struct clk_branch disp_cc_mdss_edp_gtc_clk = {
        .clkr = {
                .enable_reg = 0x207c,
                .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
+               .hw.init = &(const struct clk_init_data) {
                        .name = "disp_cc_mdss_edp_gtc_clk",
                        .parent_hws = (const struct clk_hw*[]){
                                &disp_cc_mdss_edp_gtc_clk_src.clkr.hw,
@@ -450,7 +450,7 @@ static struct clk_branch disp_cc_mdss_edp_link_clk = {
        .clkr = {
                .enable_reg = 0x2070,
                .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
+               .hw.init = &(const struct clk_init_data) {
                        .name = "disp_cc_mdss_edp_link_clk",
                        .parent_hws = (const struct clk_hw*[]){
                                &disp_cc_mdss_edp_link_clk_src.clkr.hw,
@@ -466,7 +466,7 @@ static struct clk_regmap_div disp_cc_mdss_edp_link_div_clk_src = {
        .reg = 0x2288,
        .shift = 0,
        .width = 2,
-       .clkr.hw.init = &(struct clk_init_data) {
+       .clkr.hw.init = &(const struct clk_init_data) {
                .name = "disp_cc_mdss_edp_link_div_clk_src",
                .parent_hws = (const struct clk_hw*[]){
                        &disp_cc_mdss_edp_link_clk_src.clkr.hw,
@@ -482,7 +482,7 @@ static struct clk_branch disp_cc_mdss_edp_link_intf_clk = {
        .clkr = {
                .enable_reg = 0x2074,
                .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
+               .hw.init = &(const struct clk_init_data) {
                        .name = "disp_cc_mdss_edp_link_intf_clk",
                        .parent_hws = (const struct clk_hw*[]){
                                &disp_cc_mdss_edp_link_div_clk_src.clkr.hw,
@@ -500,7 +500,7 @@ static struct clk_branch disp_cc_mdss_edp_pixel_clk = {
        .clkr = {
                .enable_reg = 0x206c,
                .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
+               .hw.init = &(const struct clk_init_data) {
                        .name = "disp_cc_mdss_edp_pixel_clk",
                        .parent_hws = (const struct clk_hw*[]){
                                &disp_cc_mdss_edp_pixel_clk_src.clkr.hw,
@@ -518,7 +518,7 @@ static struct clk_rcg2 disp_cc_mdss_esc0_clk_src = {
        .hid_width = 5,
        .parent_map = disp_cc_parent_map_2,
        .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src,
-       .clkr.hw.init = &(struct clk_init_data){
+       .clkr.hw.init = &(const struct clk_init_data) {
                .name = "disp_cc_mdss_esc0_clk_src",
                .parent_data = disp_cc_parent_data_2,
                .num_parents = ARRAY_SIZE(disp_cc_parent_data_2),
@@ -533,7 +533,7 @@ static struct clk_rcg2 disp_cc_mdss_esc1_clk_src = {
        .hid_width = 5,
        .parent_map = disp_cc_parent_map_2,
        .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src,
-       .clkr.hw.init = &(struct clk_init_data){
+       .clkr.hw.init = &(const struct clk_init_data) {
                .name = "disp_cc_mdss_esc1_clk_src",
                .parent_data = disp_cc_parent_data_2,
                .num_parents = ARRAY_SIZE(disp_cc_parent_data_2),
@@ -560,7 +560,7 @@ static struct clk_rcg2 disp_cc_mdss_mdp_clk_src = {
        .hid_width = 5,
        .parent_map = disp_cc_parent_map_5,
        .freq_tbl = ftbl_disp_cc_mdss_mdp_clk_src,
-       .clkr.hw.init = &(struct clk_init_data){
+       .clkr.hw.init = &(const struct clk_init_data) {
                .name = "disp_cc_mdss_mdp_clk_src",
                .parent_data = disp_cc_parent_data_5,
                .num_parents = ARRAY_SIZE(disp_cc_parent_data_5),
@@ -574,7 +574,7 @@ static struct clk_rcg2 disp_cc_mdss_pclk0_clk_src = {
        .mnd_width = 8,
        .hid_width = 5,
        .parent_map = disp_cc_parent_map_6,
-       .clkr.hw.init = &(struct clk_init_data){
+       .clkr.hw.init = &(const struct clk_init_data) {
                .name = "disp_cc_mdss_pclk0_clk_src",
                .parent_data = disp_cc_parent_data_6,
                .num_parents = ARRAY_SIZE(disp_cc_parent_data_6),
@@ -588,7 +588,7 @@ static struct clk_rcg2 disp_cc_mdss_pclk1_clk_src = {
        .mnd_width = 8,
        .hid_width = 5,
        .parent_map = disp_cc_parent_map_6,
-       .clkr.hw.init = &(struct clk_init_data){
+       .clkr.hw.init = &(const struct clk_init_data) {
                .name = "disp_cc_mdss_pclk1_clk_src",
                .parent_data = disp_cc_parent_data_6,
                .num_parents = ARRAY_SIZE(disp_cc_parent_data_6),
@@ -612,7 +612,7 @@ static struct clk_rcg2 disp_cc_mdss_rot_clk_src = {
        .hid_width = 5,
        .parent_map = disp_cc_parent_map_5,
        .freq_tbl = ftbl_disp_cc_mdss_rot_clk_src,
-       .clkr.hw.init = &(struct clk_init_data){
+       .clkr.hw.init = &(const struct clk_init_data) {
                .name = "disp_cc_mdss_rot_clk_src",
                .parent_data = disp_cc_parent_data_5,
                .num_parents = ARRAY_SIZE(disp_cc_parent_data_5),
@@ -627,7 +627,7 @@ static struct clk_rcg2 disp_cc_mdss_vsync_clk_src = {
        .hid_width = 5,
        .parent_map = disp_cc_parent_map_1,
        .freq_tbl = ftbl_disp_cc_mdss_byte0_clk_src,
-       .clkr.hw.init = &(struct clk_init_data){
+       .clkr.hw.init = &(const struct clk_init_data) {
                .name = "disp_cc_mdss_vsync_clk_src",
                .parent_data = disp_cc_parent_data_1,
                .num_parents = ARRAY_SIZE(disp_cc_parent_data_1),
@@ -640,7 +640,7 @@ static struct clk_regmap_div disp_cc_mdss_byte0_div_clk_src = {
        .reg = 0x2128,
        .shift = 0,
        .width = 2,
-       .clkr.hw.init = &(struct clk_init_data) {
+       .clkr.hw.init = &(const struct clk_init_data) {
                .name = "disp_cc_mdss_byte0_div_clk_src",
                .parent_hws = (const struct clk_hw*[]){
                        &disp_cc_mdss_byte0_clk_src.clkr.hw,
@@ -655,7 +655,7 @@ static struct clk_regmap_div disp_cc_mdss_byte1_div_clk_src = {
        .reg = 0x2144,
        .shift = 0,
        .width = 2,
-       .clkr.hw.init = &(struct clk_init_data) {
+       .clkr.hw.init = &(const struct clk_init_data) {
                .name = "disp_cc_mdss_byte1_div_clk_src",
                .parent_hws = (const struct clk_hw*[]){
                        &disp_cc_mdss_byte1_clk_src.clkr.hw,
@@ -665,12 +665,11 @@ static struct clk_regmap_div disp_cc_mdss_byte1_div_clk_src = {
        },
 };
 
-
 static struct clk_regmap_div disp_cc_mdss_dp_link1_div_clk_src = {
        .reg = 0x2224,
        .shift = 0,
        .width = 2,
-       .clkr.hw.init = &(struct clk_init_data) {
+       .clkr.hw.init = &(const struct clk_init_data) {
                .name = "disp_cc_mdss_dp_link1_div_clk_src",
                .parent_hws = (const struct clk_hw*[]){
                        &disp_cc_mdss_dp_link1_clk_src.clkr.hw,
@@ -680,12 +679,11 @@ static struct clk_regmap_div disp_cc_mdss_dp_link1_div_clk_src = {
        },
 };
 
-
 static struct clk_regmap_div disp_cc_mdss_dp_link_div_clk_src = {
        .reg = 0x2190,
        .shift = 0,
        .width = 2,
-       .clkr.hw.init = &(struct clk_init_data) {
+       .clkr.hw.init = &(const struct clk_init_data) {
                .name = "disp_cc_mdss_dp_link_div_clk_src",
                .parent_hws = (const struct clk_hw*[]){
                        &disp_cc_mdss_dp_link_clk_src.clkr.hw,
@@ -701,7 +699,7 @@ static struct clk_branch disp_cc_mdss_ahb_clk = {
        .clkr = {
                .enable_reg = 0x2080,
                .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
+               .hw.init = &(const struct clk_init_data) {
                        .name = "disp_cc_mdss_ahb_clk",
                        .parent_hws = (const struct clk_hw*[]){
                                &disp_cc_mdss_ahb_clk_src.clkr.hw,
@@ -719,7 +717,7 @@ static struct clk_branch disp_cc_mdss_byte0_clk = {
        .clkr = {
                .enable_reg = 0x2028,
                .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
+               .hw.init = &(const struct clk_init_data) {
                        .name = "disp_cc_mdss_byte0_clk",
                        .parent_hws = (const struct clk_hw*[]){
                                &disp_cc_mdss_byte0_clk_src.clkr.hw,
@@ -737,7 +735,7 @@ static struct clk_branch disp_cc_mdss_byte0_intf_clk = {
        .clkr = {
                .enable_reg = 0x202c,
                .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
+               .hw.init = &(const struct clk_init_data) {
                        .name = "disp_cc_mdss_byte0_intf_clk",
                        .parent_hws = (const struct clk_hw*[]){
                                &disp_cc_mdss_byte0_div_clk_src.clkr.hw,
@@ -755,7 +753,7 @@ static struct clk_branch disp_cc_mdss_byte1_clk = {
        .clkr = {
                .enable_reg = 0x2030,
                .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
+               .hw.init = &(const struct clk_init_data) {
                        .name = "disp_cc_mdss_byte1_clk",
                        .parent_hws = (const struct clk_hw*[]){
                                &disp_cc_mdss_byte1_clk_src.clkr.hw,
@@ -773,7 +771,7 @@ static struct clk_branch disp_cc_mdss_byte1_intf_clk = {
        .clkr = {
                .enable_reg = 0x2034,
                .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
+               .hw.init = &(const struct clk_init_data) {
                        .name = "disp_cc_mdss_byte1_intf_clk",
                        .parent_hws = (const struct clk_hw*[]){
                                &disp_cc_mdss_byte1_div_clk_src.clkr.hw,
@@ -791,7 +789,7 @@ static struct clk_branch disp_cc_mdss_dp_aux1_clk = {
        .clkr = {
                .enable_reg = 0x2068,
                .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
+               .hw.init = &(const struct clk_init_data) {
                        .name = "disp_cc_mdss_dp_aux1_clk",
                        .parent_hws = (const struct clk_hw*[]){
                                &disp_cc_mdss_dp_aux1_clk_src.clkr.hw,
@@ -809,7 +807,7 @@ static struct clk_branch disp_cc_mdss_dp_aux_clk = {
        .clkr = {
                .enable_reg = 0x2054,
                .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
+               .hw.init = &(const struct clk_init_data) {
                        .name = "disp_cc_mdss_dp_aux_clk",
                        .parent_hws = (const struct clk_hw*[]){
                                &disp_cc_mdss_dp_aux_clk_src.clkr.hw,
@@ -827,7 +825,7 @@ static struct clk_branch disp_cc_mdss_dp_link1_clk = {
        .clkr = {
                .enable_reg = 0x205c,
                .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
+               .hw.init = &(const struct clk_init_data) {
                        .name = "disp_cc_mdss_dp_link1_clk",
                        .parent_hws = (const struct clk_hw*[]){
                                &disp_cc_mdss_dp_link1_clk_src.clkr.hw,
@@ -845,7 +843,7 @@ static struct clk_branch disp_cc_mdss_dp_link1_intf_clk = {
        .clkr = {
                .enable_reg = 0x2060,
                .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
+               .hw.init = &(const struct clk_init_data) {
                        .name = "disp_cc_mdss_dp_link1_intf_clk",
                        .parent_hws = (const struct clk_hw*[]){
                                &disp_cc_mdss_dp_link1_div_clk_src.clkr.hw,
@@ -862,7 +860,7 @@ static struct clk_branch disp_cc_mdss_dp_link_clk = {
        .clkr = {
                .enable_reg = 0x2040,
                .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
+               .hw.init = &(const struct clk_init_data) {
                        .name = "disp_cc_mdss_dp_link_clk",
                        .parent_hws = (const struct clk_hw*[]){
                                &disp_cc_mdss_dp_link_clk_src.clkr.hw,
@@ -880,7 +878,7 @@ static struct clk_branch disp_cc_mdss_dp_link_intf_clk = {
        .clkr = {
                .enable_reg = 0x2044,
                .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
+               .hw.init = &(const struct clk_init_data) {
                        .name = "disp_cc_mdss_dp_link_intf_clk",
                        .parent_hws = (const struct clk_hw*[]){
                                &disp_cc_mdss_dp_link_div_clk_src.clkr.hw,
@@ -897,7 +895,7 @@ static struct clk_branch disp_cc_mdss_dp_pixel1_clk = {
        .clkr = {
                .enable_reg = 0x2050,
                .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
+               .hw.init = &(const struct clk_init_data) {
                        .name = "disp_cc_mdss_dp_pixel1_clk",
                        .parent_hws = (const struct clk_hw*[]){
                                &disp_cc_mdss_dp_pixel1_clk_src.clkr.hw,
@@ -915,7 +913,7 @@ static struct clk_branch disp_cc_mdss_dp_pixel2_clk = {
        .clkr = {
                .enable_reg = 0x2058,
                .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
+               .hw.init = &(const struct clk_init_data) {
                        .name = "disp_cc_mdss_dp_pixel2_clk",
                        .parent_hws = (const struct clk_hw*[]){
                                &disp_cc_mdss_dp_pixel2_clk_src.clkr.hw,
@@ -933,7 +931,7 @@ static struct clk_branch disp_cc_mdss_dp_pixel_clk = {
        .clkr = {
                .enable_reg = 0x204c,
                .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
+               .hw.init = &(const struct clk_init_data) {
                        .name = "disp_cc_mdss_dp_pixel_clk",
                        .parent_hws = (const struct clk_hw*[]){
                                &disp_cc_mdss_dp_pixel_clk_src.clkr.hw,
@@ -951,7 +949,7 @@ static struct clk_branch disp_cc_mdss_esc0_clk = {
        .clkr = {
                .enable_reg = 0x2038,
                .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
+               .hw.init = &(const struct clk_init_data) {
                        .name = "disp_cc_mdss_esc0_clk",
                        .parent_hws = (const struct clk_hw*[]){
                                &disp_cc_mdss_esc0_clk_src.clkr.hw,
@@ -969,7 +967,7 @@ static struct clk_branch disp_cc_mdss_esc1_clk = {
        .clkr = {
                .enable_reg = 0x203c,
                .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
+               .hw.init = &(const struct clk_init_data) {
                        .name = "disp_cc_mdss_esc1_clk",
                        .parent_hws = (const struct clk_hw*[]){
                                &disp_cc_mdss_esc1_clk_src.clkr.hw,
@@ -987,7 +985,7 @@ static struct clk_branch disp_cc_mdss_mdp_clk = {
        .clkr = {
                .enable_reg = 0x200c,
                .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
+               .hw.init = &(const struct clk_init_data) {
                        .name = "disp_cc_mdss_mdp_clk",
                        .parent_hws = (const struct clk_hw*[]){
                                &disp_cc_mdss_mdp_clk_src.clkr.hw,
@@ -1005,7 +1003,7 @@ static struct clk_branch disp_cc_mdss_mdp_lut_clk = {
        .clkr = {
                .enable_reg = 0x201c,
                .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
+               .hw.init = &(const struct clk_init_data) {
                        .name = "disp_cc_mdss_mdp_lut_clk",
                        .parent_hws = (const struct clk_hw*[]){
                                &disp_cc_mdss_mdp_clk_src.clkr.hw,
@@ -1022,7 +1020,7 @@ static struct clk_branch disp_cc_mdss_non_gdsc_ahb_clk = {
        .clkr = {
                .enable_reg = 0x4004,
                .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
+               .hw.init = &(const struct clk_init_data) {
                        .name = "disp_cc_mdss_non_gdsc_ahb_clk",
                        .parent_hws = (const struct clk_hw*[]){
                                &disp_cc_mdss_ahb_clk_src.clkr.hw,
@@ -1040,7 +1038,7 @@ static struct clk_branch disp_cc_mdss_pclk0_clk = {
        .clkr = {
                .enable_reg = 0x2004,
                .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
+               .hw.init = &(const struct clk_init_data) {
                        .name = "disp_cc_mdss_pclk0_clk",
                        .parent_hws = (const struct clk_hw*[]){
                                &disp_cc_mdss_pclk0_clk_src.clkr.hw,
@@ -1058,7 +1056,7 @@ static struct clk_branch disp_cc_mdss_pclk1_clk = {
        .clkr = {
                .enable_reg = 0x2008,
                .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
+               .hw.init = &(const struct clk_init_data) {
                        .name = "disp_cc_mdss_pclk1_clk",
                        .parent_hws = (const struct clk_hw*[]){
                                &disp_cc_mdss_pclk1_clk_src.clkr.hw,
@@ -1076,7 +1074,7 @@ static struct clk_branch disp_cc_mdss_rot_clk = {
        .clkr = {
                .enable_reg = 0x2014,
                .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
+               .hw.init = &(const struct clk_init_data) {
                        .name = "disp_cc_mdss_rot_clk",
                        .parent_hws = (const struct clk_hw*[]){
                                &disp_cc_mdss_rot_clk_src.clkr.hw,
@@ -1094,7 +1092,7 @@ static struct clk_branch disp_cc_mdss_rscc_ahb_clk = {
        .clkr = {
                .enable_reg = 0x400c,
                .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
+               .hw.init = &(const struct clk_init_data) {
                        .name = "disp_cc_mdss_rscc_ahb_clk",
                        .parent_hws = (const struct clk_hw*[]){
                                &disp_cc_mdss_ahb_clk_src.clkr.hw,
@@ -1112,7 +1110,7 @@ static struct clk_branch disp_cc_mdss_rscc_vsync_clk = {
        .clkr = {
                .enable_reg = 0x4008,
                .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
+               .hw.init = &(const struct clk_init_data) {
                        .name = "disp_cc_mdss_rscc_vsync_clk",
                        .parent_hws = (const struct clk_hw*[]){
                                &disp_cc_mdss_vsync_clk_src.clkr.hw,
@@ -1130,7 +1128,7 @@ static struct clk_branch disp_cc_mdss_vsync_clk = {
        .clkr = {
                .enable_reg = 0x2024,
                .enable_mask = BIT(0),
-               .hw.init = &(struct clk_init_data){
+               .hw.init = &(const struct clk_init_data) {
                        .name = "disp_cc_mdss_vsync_clk",
                        .parent_hws = (const struct clk_hw*[]){
                                &disp_cc_mdss_vsync_clk_src.clkr.hw,