serial: 8250_bcm7271: improve bcm7271 8250 port

The 8250 BCM7271 UART is not a direct match to PORT_16550A and other
generic ports do not match its hardware capabilities. PORT_ALTR matches
the rx trigger levels, but its vendor configurations are not compatible.
Unfortunately this means we need to create another port to fully capture
the hardware capabilities of the BCM7271 UART.

To alleviate some latency pressures, we default the rx trigger level to 8.

Signed-off-by: Justin Chen <justin.chen@broadcom.com>
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Acked-by: Doug Berger <opendmb@gmail.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/1692643978-16570-1-git-send-email-justin.chen@broadcom.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/tty/serial/8250/8250_bcm7271.c b/drivers/tty/serial/8250/8250_bcm7271.c
index d4b05d7ad9e8de8f9ee3ffe2c3a96ff3db5bd542..aa5aff046756bb878943c197bcd615dfb47fbc49 100644 (file)
--- a/drivers/tty/serial/8250/8250_bcm7271.c
+++ b/drivers/tty/serial/8250/8250_bcm7271.c
@@ -1042,7 +1042,7 @@ static int brcmuart_probe(struct platform_device *pdev)
        dev_dbg(dev, "DMA is %senabled\n", priv->dma_enabled ? "" : "not ");
 
        memset(&up, 0, sizeof(up));
-       up.port.type = PORT_16550A;
+       up.port.type = PORT_BCM7271;
        up.port.uartclk = clk_rate;
        up.port.dev = dev;
        up.port.mapbase = mapbase;
@@ -1056,8 +1056,6 @@ static int brcmuart_probe(struct platform_device *pdev)
                | UPF_FIXED_PORT | UPF_FIXED_TYPE;
        up.port.dev = dev;
        up.port.private_data = priv;
-       up.capabilities = UART_CAP_FIFO | UART_CAP_AFE;
-       up.port.fifosize = 32;
 
        /* Check for a fixed line number */
        ret = of_alias_get_id(np, "serial");

diff --git a/drivers/tty/serial/8250/8250_port.c b/drivers/tty/serial/8250/8250_port.c
index f59328e1c35dc119525d8e52c62a58a63edda7dc..fb891b67968f0fb61914293b8aeea0b00f68427b 100644 (file)
--- a/drivers/tty/serial/8250/8250_port.c
+++ b/drivers/tty/serial/8250/8250_port.c
@@ -322,6 +322,14 @@ static const struct serial8250_config uart_config[] = {
                .rxtrig_bytes   = {2, 66, 130, 194},
                .flags          = UART_CAP_FIFO,
        },
+       [PORT_BCM7271] = {
+               .name           = "Broadcom BCM7271 UART",
+               .fifo_size      = 32,
+               .tx_loadsz      = 32,
+               .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01,
+               .rxtrig_bytes   = {1, 8, 16, 30},
+               .flags          = UART_CAP_FIFO | UART_CAP_AFE,
+       },
 };
 
 /* Uart divisor latch read */

diff --git a/include/uapi/linux/serial_core.h b/include/uapi/linux/serial_core.h
index d19dabd2c20d34c960fe0b788c1c46c727c548c9..add349889d0a391488dadcb936abf3ba5a9cee77 100644 (file)
--- a/include/uapi/linux/serial_core.h
+++ b/include/uapi/linux/serial_core.h
@@ -123,6 +123,9 @@
 /* Xilinx uartlite */
 #define PORT_UARTLITE  74
 
+/* Broadcom BCM7271 UART */
+#define PORT_BCM7271   76
+
 /* Broadcom SB1250, etc. SOC */
 #define PORT_SB1250_DUART      77